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Add configurable flags for optional track cuts
1 parent 00096e3 commit d4c0760

1 file changed

Lines changed: 50 additions & 7 deletions

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‎PWGLF/Tasks/Nuspex/dedxPidAnalysis.cxx‎

Lines changed: 50 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -128,6 +128,11 @@ struct DedxPidAnalysis {
128128

129129
};
130130

131+
enum NDCAzSelectionMode : int {
132+
DCAz1 = 1,
133+
DCAzpT = 2,
134+
};
135+
131136
enum MomentumMode : int {
132137
TpcInnerParam = 1,
133138
TotalMomentum = 2
@@ -205,7 +210,11 @@ struct DedxPidAnalysis {
205210
"max z distance to IP"};
206211
Configurable<float> etaMin{"etaMin", -0.8f, "etaMin"};
207212
Configurable<float> etaMax{"etaMax", +0.8f, "etaMax"};
208-
// Configurable<float> minNCrossedRowsOverFindableClustersTPC{"minNCrossedRowsOverFindableClustersTPC", 0.8f, "Additional cut on the minimum value of the ratio between crossed rows and findable clusters in the TPC"};
213+
// Configurables para activar/desactivar cortes
214+
Configurable<bool> requireITSRefit{"requireITSRefit", true, "Require ITS refit"};
215+
Configurable<bool> requireTPCRefit{"requireTPCRefit", true, "Require TPC refit"};
216+
Configurable<bool> requireMinNCrossedRowsOverFindableClustersTPC{"requireMinNCrossedRowsOverFindableClustersTPC", true, "Require min N crossed rows / findable clusters TPC"};
217+
Configurable<float> minNCrossedRowsOverFindableClustersTPC{"minNCrossedRowsOverFindableClustersTPC", 0.8f, "Additional cut on the minimum value of the ratio between crossed rows and findable clusters in the TPC"};
209218
Configurable<float> nSigmaDCAxy{"nSigmaDCAxy", 3.0, "nSigma DCAxy selection"};
210219
Configurable<float> dcaXYp0{"dcaXYp0", 0.0105f, "DCAxy formula: p0 + p1/pt^p2"};
211220
Configurable<float> dcaXYp1{"dcaXYp1", 0.0350f, "DCAxy p1 parameter"};
@@ -214,7 +223,7 @@ struct DedxPidAnalysis {
214223
Configurable<float> dcaZp1{"dcaZp1", 0.0350f, "DCAz p1 parameter"};
215224
Configurable<float> dcaZp2{"dcaZp2", 1.1f, "DCAz p2 parameter"};
216225
Configurable<float> nSigmaDCAz{"nSigmaDCAz", 3.0, "nSigma DCAz selection"};
217-
// Configurable<float> maxDCAz{"maxDCAz", 0.1f, "maxDCAz"};
226+
Configurable<float> maxDCAz{"maxDCAz", 0.1f, "maxDCAz"};
218227
Configurable<float> pionMin{"pionMin", 0.35f, "pionMin"};
219228
Configurable<float> pionMax{"pionMax", 0.45f, "pionMax"};
220229
Configurable<float> elTofCut{"elTofCut", 0.1f, "elTofCut"};
@@ -252,6 +261,7 @@ struct DedxPidAnalysis {
252261
Configurable<bool> nPileUp{"nPileUp", true, "Rejects events with pileup in the same bunch crossing"};
253262
Configurable<int> nINELSelectionMode{"nINELSelectionMode", 2, "INEL event selection: 1 no sel, 2 INEL>0, 3 INEL>1"};
254263
Configurable<bool> nGoodITS{"nGoodITS", true, "Numbers of inactive chips on all ITS layers are below maximum allowed values"};
264+
Configurable<int> nDCAzOption{"nDCAzOption", 1, "DCA selection: 1: from -0.1 to 0.1, 2: pT dependent cut"};
255265
Configurable<int> v0SelectionMode{"v0SelectionMode", 3, "V0 Selection base on TPC: 1, TOF:2 ,Both:3"};
256266
Configurable<int> momentumMode{"momentumMode", 2, "1: TPC inner param, 2: Total momentum p"};
257267
Configurable<uint8_t> v0TypeSelection{"v0TypeSelection", 1, "select on a certain V0 type (leave negative if no selection desired)"};
@@ -283,10 +293,16 @@ struct DedxPidAnalysis {
283293
TrackSelection selectedTracks;
284294
selectedTracks.SetPtRange(0.1f, 1e10f);
285295
selectedTracks.SetEtaRange(etaMin, etaMax);
286-
// selectedTracks.SetRequireITSRefit(true);
287-
// selectedTracks.SetRequireTPCRefit(true);
296+
if (requireITSRefit.value) {
297+
selectedTracks.SetRequireITSRefit(true);
298+
}
299+
if (requireTPCRefit.value) {
300+
selectedTracks.SetRequireTPCRefit(true);
301+
}
288302
selectedTracks.SetMinNCrossedRowsTPC(static_cast<int>(minNCrossedRowsTPC.value));
289-
// selectedTracks.SetMinNCrossedRowsOverFindableClustersTPC(minNCrossedRowsOverFindableClustersTPC);
303+
if (requireMinNCrossedRowsOverFindableClustersTPC.value) {
304+
selectedTracks.SetMinNCrossedRowsOverFindableClustersTPC(minNCrossedRowsOverFindableClustersTPC.value);
305+
}
290306
selectedTracks.SetMaxChi2PerClusterTPC(maxChi2TPC);
291307
selectedTracks.SetRequireHitsInITSLayers(1, {0, 1, 2});
292308
selectedTracks.SetMaxChi2PerClusterITS(maxChi2ITS);
@@ -312,11 +328,33 @@ struct DedxPidAnalysis {
312328
} else {
313329
LOGF(info, "GoodZvtxFT0vsPV cut disabled");
314330
}
331+
if (requireITSRefit) {
332+
LOGF(info, "Applying ITSRefit cut");
333+
} else {
334+
LOGF(info, "ITSRefit cut disabled");
335+
}
336+
337+
if (requireTPCRefit) {
338+
LOGF(info, "Applying TPCRefit cut");
339+
} else {
340+
LOGF(info, "TPCRefit cut disabled");
341+
}
342+
if (requireMinNCrossedRowsOverFindableClustersTPC) {
343+
LOGF(info, "Applying MinNCrossedRowsOverFindableClustersTPC cut");
344+
} else {
345+
LOGF(info, "MinNCrossedRowsOverFindableClustersTPC cut disabled");
346+
}
347+
315348
if (nGoodITS) {
316349
LOGF(info, "Applying GoodITSLayersAll cut");
317350
} else {
318351
LOGF(info, "GoodITSLayersAll cut disabled");
319352
}
353+
if (nDCAzOption == DCAz1) {
354+
LOGF(info, "Applying -0.1 to 0.1 cut");
355+
} else if (nDCAzOption == DCAzpT) {
356+
LOGF(info, "Applying pT-dependet cut");
357+
}
320358
if (nINELSelectionMode == NoSelINEL) {
321359
LOGF(info, "Applying just INEL");
322360
label = "INEL";
@@ -856,8 +894,13 @@ struct DedxPidAnalysis {
856894
template <typename T1>
857895
bool passesDCAzCut(const T1& track) const
858896
{
859-
const float maxiDcaZ = nSigmaDCAz.value * (dcaZp0.value + dcaZp1.value / std::pow(track.pt(), dcaZp2.value)) / 3.0;
860-
return std::abs(track.dcaZ()) < maxiDcaZ;
897+
if (nDCAzOption.value == DCAz1) {
898+
return std::abs(track.dcaZ()) < maxDCAz.value;
899+
} else if (nDCAzOption.value == DCAzpT) {
900+
const float maxiDcaZ = nSigmaDCAz.value * (dcaZp0.value + dcaZp1.value / std::pow(track.pt(), dcaZp2.value)) / 3.0;
901+
return std::abs(track.dcaZ()) < maxiDcaZ;
902+
}
903+
return true;
861904
}
862905
// Momentum
863906
template <typename T1>

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