From e8e3e2deafee8dba21218e4bd7b547a066985843 Mon Sep 17 00:00:00 2001 From: good-circle Date: Fri, 18 Sep 2026 00:52:35 +0800 Subject: [PATCH] CSR: treat CSRRS/CSRRC with rs1/uimm=0 as non-writes csrrs/csrrc with a zero source is a read. Do not raise illegal-instruction on read-only CSRs, and do not take the write path that would skip mcycle/minstret auto-increment. --- src/main/scala/nutcore/backend/fu/CSR.scala | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/main/scala/nutcore/backend/fu/CSR.scala b/src/main/scala/nutcore/backend/fu/CSR.scala index cd90c1c0..1ab9b810 100644 --- a/src/main/scala/nutcore/backend/fu/CSR.scala +++ b/src/main/scala/nutcore/backend/fu/CSR.scala @@ -493,7 +493,8 @@ class CSR(implicit val p: NutCoreConfig) extends NutCoreModule with HasCSRConst{ // General CSR wen check val wen = (valid && func =/= CSROpType.jmp) && (addr =/= Satp.U || satpLegalMode) && !io.isBackendException val isIllegalMode = privilegeMode < addr(9, 8) - val justRead = (func === CSROpType.set || func === CSROpType.seti) && src1 === 0.U // csrrs and csrrsi are exceptions when their src1 is zero + val justRead = (func === CSROpType.set || func === CSROpType.clr || + func === CSROpType.seti || func === CSROpType.clri) && io.cfIn.instr(19, 15) === 0.U val isIllegalWrite = wen && (addr(11, 10) === "b11".U) && !justRead // Write a read-only CSR register val isIllegalAccess = isIllegalMode || isIllegalWrite