Taskfile.yml

# SPDX-FileCopyrightText: 2026 aesc silicon
#
# SPDX-License-Identifier: CERN-OHL-W-2.0
# yaml-language-server: $schema=https://taskfile.dev/schema.json

version: '3'

includes:
  lib:
    taskfile: ./modules/elements/zibal/Taskfile.yaml
    optional: true
    flatten: true

vars:
  PDK: '{{.PDK | default "ihp-sg13g2"}}'

  TECH:
    sh: |
      case "{{.PDK}}" in
        ihp-sg13g2) echo "sg13g2" ;;
        sky130A)    echo "sky130" ;;
        gf180mcuD)  echo "gf180mcu" ;;
        *) echo ""; echo "Unknown PDK: {{.PDK}}" >&2; exit 1 ;;
      esac
  PDK_FAMILY:
    sh: |
      case "{{.PDK}}" in
        ihp-sg13g2) echo "ihp-sg13g2" ;;
        sky130A)    echo "sky130" ;;
        gf180mcuD)  echo "gf180mcu" ;;
        *) echo ""; echo "Unknown PDK: {{.PDK}}" >&2; exit 1 ;;
      esac
  PDK_HASH:
    sh: |
      case "{{.PDK}}" in
        ihp-sg13g2) echo "ee974c3adc69d0f36adbf20577079f0df419d702" ;;
        sky130A)    echo "f6eeac7dad085ffcc829ccfd721f7b4ce39edcf7" ;;
        gf180mcuD)  echo "f6eeac7dad085ffcc829ccfd721f7b4ce39edcf7" ;;
        *) echo ""; echo "Unknown PDK: {{.PDK}}" >&2; exit 1 ;;
      esac

  KLAYOUT_HOME: "{{.PDK_ROOT}}/{{.PDK}}/libs.tech/klayout/"
  CONTAINER_NAME: ipforge_container
  CONTAINER_ENV: " \
    -e TECH={{.TECH}} \
    -e PDK={{.PDK}} \
    -e PDK_FAMILY={{.PDK_FAMILY}} \
    -e PDK_ROOT={{.PDK_ROOT}} \
    -e KLAYOUT_HOME={{.KLAYOUT_HOME}} \
    -e NAFARR_BASE={{.NAFARR_BASE}} \
    -e ZIBAL_BASE={{.ZIBAL_BASE}} \
    -e BUILD_ROOT={{.BUILD_ROOT}} \
    -e USER={{.USER}} \
"

env:
  PDK_ROOT: "{{.PWD}}/pdks"
  NAFARR_BASE: "{{.PWD}}/modules/elements/nafarr"
  ZIBAL_BASE: "{{.PWD}}/modules/elements/zibal"
  BUILD_ROOT: "{{.PWD}}/build"
  OPENROAD_FLOW_ROOT: "{{.PWD}}/tools/OpenROAD-flow-scripts/flow"

tasks:
  _project-prepare:
    cmds:
      - virtualenv venv
      - venv/bin/pip3 install podman-compose==1.0.6
      - venv/bin/pip3 install reuse
      - curl https://storage.googleapis.com/git-repo-downloads/repo > repo
      - chmod a+rx repo
      - ./repo init -u https://github.com/aesc-silicon/i2c-gpio-expander.git -b {{if .branch}}{{.branch}}{{else}}main{{end}} -m manifest{{.manifest_suffix}}.xml

  _build-container:
    cmds:
      - venv/bin/podman-compose {{if .CI}}--podman-pull-args=-q{{end}} pull

  repo-sync:
    desc: Downloads and synchronizes all required dependencies.
    cmds:
      - ./repo sync {{if .CI}}-q{{end}}

  install:
    desc: Installs all dependencies and prepares the project for FPGA and chip workflows.
    cmds:
      - task: _project-prepare
      - task: _build-container
      - task: repo-sync
    vars:
      branch: "main"
      manifest_suffix: ""

  export:
    desc: Exports RTL from SpinalHDL/Chisel for the given ip.
    cmds:
      - "{{.CONTAINER_CHECK}}"
      - task: lib-sbt-publishLocal
        vars:
          project: "modules/elements/vexiiriscv"
      - "{{.RUN}} 'IP_ROOT={{.PWD}}/sources/{{.ip}}/ sbt \"runMain digital.peripherals.io.gpio.GpioExport\"'"

  build:
    desc: Runs LibreLane physical implementation for the given ip/macro/PDK.
    vars:
      LIBRELANE_CMD: >-
        PYTHONPATH={{.PWD}}/tools/librelane:{{.PWD}}/tools/librelane-plugins python3 -m librelane
        --pdk {{.PDK}} --pdk-root {{.PDK_ROOT}}
        --force-run-dir {{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/librelane/{{.PDK}}
        {{.PWD}}/sources/{{.ip}}/{{.PDK}}/flow/librelane/{{.macro}}.yml
    cmds:
      - "{{.CONTAINER_CHECK}}"
      - "{{.PDK_CHECK}}"
      - task: lib-sbt-publishLocal
        vars:
          project: "modules/elements/vexiiriscv"
      - "rm -rf {{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/librelane/{{.PDK}}"
      - "mkdir -p {{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/librelane/{{.PDK}}"
      - "{{.RUN}} '{{.LIBRELANE_CMD}}'"

  run-test:
    desc: Runs cocotb simulation tests for the given ip/macro/PDK.
    vars:
      TEST_ENV: >-
        SIM_BUILD={{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/verification/{{.PDK}}/test
        COCOTB_RESULTS_FILE={{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/verification/{{.PDK}}/test/results.xml
        TOPLEVEL={{.macro}}
        COCOTB_TEST_MODULES=test_{{.macro}}
        VERILOG_SOURCES={{.PWD}}/sources/{{.ip}}/rtl/verilog/{{.macro}}.v
    cmds:
      - "{{.CONTAINER_CHECK}}"
      - "{{.RUN}} '{{.TEST_ENV}} make -C {{.PWD}}/sources/{{.ip}}/test/'"

  check-license:
    desc: Checks REUSE license compliance for the given ip.
    cmds:
      - "venv/bin/reuse --root {{.PWD}}/sources/{{.ip}}/ lint"

  openroad:
    desc: Opens the final ODB in the OpenROAD GUI for the given ip/macro/PDK.
    vars:
      ODB: "{{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/librelane/{{.PDK}}/final/odb/{{.macro}}.odb"
    cmds:
      - "{{.CONTAINER_CHECK}}"
      - "{{.RUN}} '{{.OPENROAD_EXE}} -gui <(echo read_db {{.ODB}})'"

  klayout:
    desc: |
      Opens the final GDS in KLayout for the given ip/macro/PDK.
      Use mode=drc to also load the KLayout DRC marker database.
    vars:
      GDS: "{{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/librelane/{{.PDK}}/final/gds/{{.macro}}.gds"
      DRC_DB: "{{.BUILD_ROOT}}/{{.ip}}/{{.macro}}/librelane/{{.PDK}}/65-klayout-drc/reports/drc.klayout.lyrdb"
      DRC_FLAG: '{{if eq .mode "drc"}}-m {{.DRC_DB}}{{end}}'
    cmds:
      - "{{.CONTAINER_CHECK}}"
      - "{{.RUN}} 'klayout -n {{.TECH}} -e {{.GDS}} {{.DRC_FLAG}}'"

  default:
    cmds:
      - task: build
      - task: run-test
      - task: check-license