Repository navigation
Expand file tree
/
Copy pathvector06cc.qsf
More file actions
427 lines (414 loc) · 21.5 KB
/
Copy pathvector06cc.qsf
File metadata and controls
427 lines (414 loc) · 21.5 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files from any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# The default values for assignments are stored in the file
# vector06cc_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
set_global_assignment -name DEVICE EP2C20F484C7
set_global_assignment -name FAMILY "Cyclone II"
set_global_assignment -name TOP_LEVEL_ENTITY vector06cc
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:55:30 OCTOBER 17, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name DEVICE_FILTER_PACKAGE FBGA
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 484
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_location_assignment PIN_R22 -to KEY[0]
set_location_assignment PIN_R21 -to KEY[1]
set_location_assignment PIN_T22 -to KEY[2]
set_location_assignment PIN_T21 -to KEY[3]
set_location_assignment PIN_U22 -to LEDg[0]
set_location_assignment PIN_U21 -to LEDg[1]
set_location_assignment PIN_V22 -to LEDg[2]
set_location_assignment PIN_V21 -to LEDg[3]
set_location_assignment PIN_W22 -to LEDg[4]
set_location_assignment PIN_W21 -to LEDg[5]
set_location_assignment PIN_Y22 -to LEDg[6]
set_location_assignment PIN_Y21 -to LEDg[7]
set_location_assignment PIN_R20 -to LEDr[0]
set_location_assignment PIN_R19 -to LEDr[1]
set_location_assignment PIN_U19 -to LEDr[2]
set_location_assignment PIN_Y19 -to LEDr[3]
set_location_assignment PIN_T18 -to LEDr[4]
set_location_assignment PIN_V19 -to LEDr[5]
set_location_assignment PIN_Y18 -to LEDr[6]
set_location_assignment PIN_U18 -to LEDr[7]
set_location_assignment PIN_R18 -to LEDr[8]
set_location_assignment PIN_R17 -to LEDr[9]
set_location_assignment PIN_L1 -to clk50mhz
set_location_assignment PIN_D12 -to CLOCK_27[0]
set_location_assignment PIN_E12 -to CLOCK_27[1]
set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_location_assignment PIN_L22 -to SW[0]
set_location_assignment PIN_L21 -to SW[1]
set_location_assignment PIN_M22 -to SW[2]
set_location_assignment PIN_V12 -to SW[3]
set_location_assignment PIN_W12 -to SW[4]
set_location_assignment PIN_U12 -to SW[5]
set_location_assignment PIN_U11 -to SW[6]
set_location_assignment PIN_M2 -to SW[7]
set_location_assignment PIN_M1 -to SW[8]
set_location_assignment PIN_L2 -to SW[9]
set_location_assignment PIN_A13 -to GPIO_0[0]
set_location_assignment PIN_B13 -to GPIO_0[1]
set_location_assignment PIN_A14 -to GPIO_0[2]
set_location_assignment PIN_B14 -to GPIO_0[3]
set_location_assignment PIN_A15 -to GPIO_0[4]
set_location_assignment PIN_B15 -to GPIO_0[5]
set_location_assignment PIN_A16 -to GPIO_0[6]
set_location_assignment PIN_B16 -to GPIO_0[7]
set_location_assignment PIN_A17 -to GPIO_0[8]
set_location_assignment PIN_B17 -to GPIO_0[9]
set_location_assignment PIN_A18 -to GPIO_0[10]
set_location_assignment PIN_B18 -to GPIO_0[11]
set_location_assignment PIN_A19 -to GPIO_0[12]
set_location_assignment PIN_H12 -to GPIO_1[0]
set_location_assignment PIN_H13 -to GPIO_1[1]
set_location_assignment PIN_H14 -to GPIO_1[2]
set_location_assignment PIN_G15 -to GPIO_1[3]
set_location_assignment PIN_E14 -to GPIO_1[4]
set_location_assignment PIN_E15 -to GPIO_1[5]
set_location_assignment PIN_F15 -to GPIO_1[6]
set_location_assignment PIN_G16 -to GPIO_1[7]
set_location_assignment PIN_F12 -to GPIO_1[8]
set_location_assignment PIN_F13 -to GPIO_1[9]
set_location_assignment PIN_C14 -to GPIO_1[10]
set_location_assignment PIN_D14 -to GPIO_1[11]
set_location_assignment PIN_D15 -to GPIO_1[12]
set_location_assignment PIN_D16 -to GPIO_1[13]
set_location_assignment PIN_C17 -to GPIO_1[14]
set_location_assignment PIN_C18 -to GPIO_1[15]
set_location_assignment PIN_C19 -to GPIO_1[16]
set_location_assignment PIN_C20 -to GPIO_1[17]
set_location_assignment PIN_D19 -to GPIO_1[18]
set_location_assignment PIN_D20 -to GPIO_1[19]
set_location_assignment PIN_E20 -to GPIO_1[20]
set_location_assignment PIN_F20 -to GPIO_1[21]
set_location_assignment PIN_E19 -to GPIO_1[22]
set_location_assignment PIN_E18 -to GPIO_1[23]
set_location_assignment PIN_G20 -to GPIO_1[24]
set_location_assignment PIN_G18 -to GPIO_1[25]
set_location_assignment PIN_G17 -to GPIO_1[26]
set_location_assignment PIN_H17 -to GPIO_1[27]
set_location_assignment PIN_J15 -to GPIO_1[28]
set_location_assignment PIN_H18 -to GPIO_1[29]
set_location_assignment PIN_N22 -to GPIO_1[30]
set_location_assignment PIN_N21 -to GPIO_1[31]
set_location_assignment PIN_P15 -to GPIO_1[32]
set_location_assignment PIN_N15 -to GPIO_1[33]
set_location_assignment PIN_P17 -to GPIO_1[34]
set_location_assignment PIN_P18 -to GPIO_1[35]
set_location_assignment PIN_J2 -to HEX0[0]
set_location_assignment PIN_J1 -to HEX0[1]
set_location_assignment PIN_H2 -to HEX0[2]
set_location_assignment PIN_H1 -to HEX0[3]
set_location_assignment PIN_F2 -to HEX0[4]
set_location_assignment PIN_F1 -to HEX0[5]
set_location_assignment PIN_E2 -to HEX0[6]
set_location_assignment PIN_E1 -to HEX1[0]
set_location_assignment PIN_H6 -to HEX1[1]
set_location_assignment PIN_H5 -to HEX1[2]
set_location_assignment PIN_H4 -to HEX1[3]
set_location_assignment PIN_G3 -to HEX1[4]
set_location_assignment PIN_D2 -to HEX1[5]
set_location_assignment PIN_D1 -to HEX1[6]
set_location_assignment PIN_G5 -to HEX2[0]
set_location_assignment PIN_G6 -to HEX2[1]
set_location_assignment PIN_C2 -to HEX2[2]
set_location_assignment PIN_C1 -to HEX2[3]
set_location_assignment PIN_E3 -to HEX2[4]
set_location_assignment PIN_E4 -to HEX2[5]
set_location_assignment PIN_D3 -to HEX2[6]
set_location_assignment PIN_F4 -to HEX3[0]
set_location_assignment PIN_D5 -to HEX3[1]
set_location_assignment PIN_D6 -to HEX3[2]
set_location_assignment PIN_J4 -to HEX3[3]
set_location_assignment PIN_L8 -to HEX3[4]
set_location_assignment PIN_F3 -to HEX3[5]
set_location_assignment PIN_D4 -to HEX3[6]
set_location_assignment PIN_D9 -to VGA_R[0]
set_location_assignment PIN_C9 -to VGA_R[1]
set_location_assignment PIN_A7 -to VGA_R[2]
set_location_assignment PIN_B7 -to VGA_R[3]
set_location_assignment PIN_B8 -to VGA_G[0]
set_location_assignment PIN_C10 -to VGA_G[1]
set_location_assignment PIN_B9 -to VGA_G[2]
set_location_assignment PIN_A8 -to VGA_G[3]
set_location_assignment PIN_A9 -to VGA_B[0]
set_location_assignment PIN_D11 -to VGA_B[1]
set_location_assignment PIN_A10 -to VGA_B[2]
set_location_assignment PIN_B10 -to VGA_B[3]
set_location_assignment PIN_A11 -to VGA_HS
set_location_assignment PIN_B11 -to VGA_VS
set_location_assignment PIN_AA3 -to SRAM_ADDR[0]
set_location_assignment PIN_AB3 -to SRAM_ADDR[1]
set_location_assignment PIN_AA4 -to SRAM_ADDR[2]
set_location_assignment PIN_AB4 -to SRAM_ADDR[3]
set_location_assignment PIN_AA5 -to SRAM_ADDR[4]
set_location_assignment PIN_AB10 -to SRAM_ADDR[5]
set_location_assignment PIN_AA11 -to SRAM_ADDR[6]
set_location_assignment PIN_AB11 -to SRAM_ADDR[7]
set_location_assignment PIN_V11 -to SRAM_ADDR[8]
set_location_assignment PIN_W11 -to SRAM_ADDR[9]
set_location_assignment PIN_R11 -to SRAM_ADDR[10]
set_location_assignment PIN_T11 -to SRAM_ADDR[11]
set_location_assignment PIN_Y10 -to SRAM_ADDR[12]
set_location_assignment PIN_U10 -to SRAM_ADDR[13]
set_location_assignment PIN_R10 -to SRAM_ADDR[14]
set_location_assignment PIN_T7 -to SRAM_ADDR[15]
set_location_assignment PIN_Y6 -to SRAM_ADDR[16]
set_location_assignment PIN_Y5 -to SRAM_ADDR[17]
set_location_assignment PIN_AB5 -to SRAM_CE_N
set_location_assignment PIN_AA6 -to SRAM_DQ[0]
set_location_assignment PIN_AB6 -to SRAM_DQ[1]
set_location_assignment PIN_AA7 -to SRAM_DQ[2]
set_location_assignment PIN_AB7 -to SRAM_DQ[3]
set_location_assignment PIN_AA8 -to SRAM_DQ[4]
set_location_assignment PIN_AB8 -to SRAM_DQ[5]
set_location_assignment PIN_AA9 -to SRAM_DQ[6]
set_location_assignment PIN_AB9 -to SRAM_DQ[7]
set_location_assignment PIN_Y9 -to SRAM_DQ[8]
set_location_assignment PIN_W9 -to SRAM_DQ[9]
set_location_assignment PIN_V9 -to SRAM_DQ[10]
set_location_assignment PIN_U9 -to SRAM_DQ[11]
set_location_assignment PIN_R9 -to SRAM_DQ[12]
set_location_assignment PIN_W8 -to SRAM_DQ[13]
set_location_assignment PIN_V8 -to SRAM_DQ[14]
set_location_assignment PIN_U8 -to SRAM_DQ[15]
set_location_assignment PIN_Y7 -to SRAM_LB_N
set_location_assignment PIN_T8 -to SRAM_OE_N
set_location_assignment PIN_W7 -to SRAM_UB_N
set_location_assignment PIN_AA10 -to SRAM_WE_N
set_location_assignment PIN_C3 -to ~nCSO~
set_location_assignment PIN_K5 -to altera_reserved_tdi
set_location_assignment PIN_L5 -to altera_reserved_tdo
set_location_assignment PIN_K6 -to altera_reserved_tms
set_location_assignment PIN_C4 -to ~ASDO~
set_location_assignment PIN_K2 -to altera_reserved_tck
set_instance_assignment -name PAD_TO_CORE_DELAY 6 -from KEY[1] -to clk3mhz
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk24
set_global_assignment -name END_TIME "1 ms"
set_global_assignment -name SIMULATION_MODE TIMING
set_global_assignment -name INCREMENTAL_VECTOR_INPUT_SOURCE clk50mhz.vwf
set_global_assignment -name SIMULATION_VDB_RESULT_FLUSH OFF
set_global_assignment -name SETUP_HOLD_DETECTION ON
set_global_assignment -name GLITCH_DETECTION ON
set_location_assignment PIN_A3 -to I2C_SCLK
set_location_assignment PIN_B3 -to I2C_SDAT
set_location_assignment PIN_A6 -to AUD_ADCLRCK
set_location_assignment PIN_B6 -to AUD_ADCDAT
set_location_assignment PIN_A5 -to AUD_DACLRCK
set_location_assignment PIN_B5 -to AUD_DACDAT
set_location_assignment PIN_B4 -to AUD_XCK
set_location_assignment PIN_A4 -to AUD_BCLK
set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SCLK
set_instance_assignment -name IO_STANDARD LVTTL -to I2C_SDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCLRCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_ADCDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACLRCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_DACDAT
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_XCK
set_instance_assignment -name IO_STANDARD LVTTL -to AUD_BCLK
set_location_assignment PIN_H15 -to PS2_CLK
set_location_assignment PIN_J14 -to PS2_DAT
set_location_assignment PIN_F14 -to UART_RXD
set_location_assignment PIN_G12 -to UART_TXD
set_instance_assignment -name IO_STANDARD LVTTL -to PS2_CLK
set_instance_assignment -name IO_STANDARD LVTTL -to PS2_DAT
set_instance_assignment -name IO_STANDARD LVTTL -to UART_RXD
set_instance_assignment -name IO_STANDARD LVTTL -to UART_TXD
set_location_assignment PIN_V20 -to SD_CLK
set_location_assignment PIN_Y20 -to SD_CMD
set_location_assignment PIN_W20 -to SD_DAT
set_location_assignment PIN_U20 -to SD_DAT3
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY reports
set_location_assignment PIN_C7 -to TCK
set_location_assignment PIN_D7 -to TDO
set_location_assignment PIN_D8 -to TCS
set_location_assignment PIN_E8 -to TDI
set_global_assignment -name CYCLONEII_OPTIMIZATION_TECHNIQUE BALANCED
set_global_assignment -name CYCLONEII_RESERVE_NCEO_AFTER_CONFIGURATION "USE AS REGULAR IO"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name AUTO_MERGE_PLLS ON
set_global_assignment -name STRATIX_CONFIGURATION_DEVICE EPCS4
set_global_assignment -name PARTITION_COLOR 14622752 -section_id Top
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to "clockster:clockmaker|clk30"
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_ASYNCHRONOUS_SIGNAL_PIPELINING OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_EFFORT EXTRA
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC_FOR_AREA OFF
set_global_assignment -name PHYSICAL_SYNTHESIS_MAP_LOGIC_TO_MEMORY_FOR_AREA OFF
set_global_assignment -name EDA_SIMULATION_TOOL "<None>"
set_global_assignment -name EDA_TIME_SCALE "1 ps" -section_id eda_simulation
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT NONE -section_id eda_simulation
set_global_assignment -name ENABLE_SIGNALTAP OFF
set_global_assignment -name USE_SIGNALTAP_FILE vector06cc.stp
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_location_assignment PIN_B19 -to GPIO_0[13]
set_location_assignment PIN_A20 -to GPIO_0[14]
set_location_assignment PIN_J21 -to GPIO_0[26]
set_location_assignment PIN_G22 -to GPIO_0[25]
set_location_assignment PIN_G21 -to GPIO_0[24]
set_location_assignment PIN_F22 -to GPIO_0[23]
set_location_assignment PIN_F21 -to GPIO_0[22]
set_location_assignment PIN_E22 -to GPIO_0[21]
set_location_assignment PIN_E21 -to GPIO_0[20]
set_location_assignment PIN_D22 -to GPIO_0[19]
set_location_assignment PIN_D21 -to GPIO_0[18]
set_location_assignment PIN_C22 -to GPIO_0[17]
set_location_assignment PIN_C21 -to GPIO_0[16]
set_location_assignment PIN_B20 -to GPIO_0[15]
set_location_assignment PIN_B12 -to clk24mhz
set_location_assignment PIN_W4 -to sdr_addr[0]
set_location_assignment PIN_W5 -to sdr_addr[1]
set_location_assignment PIN_Y3 -to sdr_addr[2]
set_location_assignment PIN_Y4 -to sdr_addr[3]
set_location_assignment PIN_R6 -to sdr_addr[4]
set_location_assignment PIN_R5 -to sdr_addr[5]
set_location_assignment PIN_P6 -to sdr_addr[6]
set_location_assignment PIN_P5 -to sdr_addr[7]
set_location_assignment PIN_P3 -to sdr_addr[8]
set_location_assignment PIN_N4 -to sdr_addr[9]
set_location_assignment PIN_W3 -to sdr_addr[10]
set_location_assignment PIN_N6 -to sdr_addr[11]
set_location_assignment PIN_U3 -to sdr_bank_addr[0]
set_location_assignment PIN_V4 -to sdr_bank_addr[1]
set_location_assignment PIN_T3 -to sdr_cas_n
set_location_assignment PIN_U4 -to sdr_clk
set_location_assignment PIN_N3 -to sdr_clock_enable
set_location_assignment PIN_T6 -to sdr_cs_n
set_location_assignment PIN_U1 -to sdr_data[0]
set_location_assignment PIN_U2 -to sdr_data[1]
set_location_assignment PIN_V1 -to sdr_data[2]
set_location_assignment PIN_V2 -to sdr_data[3]
set_location_assignment PIN_W1 -to sdr_data[4]
set_location_assignment PIN_W2 -to sdr_data[5]
set_location_assignment PIN_Y1 -to sdr_data[6]
set_location_assignment PIN_Y2 -to sdr_data[7]
set_location_assignment PIN_N1 -to sdr_data[8]
set_location_assignment PIN_N2 -to sdr_data[9]
set_location_assignment PIN_P1 -to sdr_data[10]
set_location_assignment PIN_P2 -to sdr_data[11]
set_location_assignment PIN_R1 -to sdr_data[12]
set_location_assignment PIN_R2 -to sdr_data[13]
set_location_assignment PIN_T1 -to sdr_data[14]
set_location_assignment PIN_T2 -to sdr_data[15]
set_location_assignment PIN_R7 -to sdr_data_mask[0]
set_location_assignment PIN_M5 -to sdr_data_mask[1]
set_location_assignment PIN_T5 -to sdr_ras_n
set_location_assignment PIN_R8 -to sdr_we_n
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk100
set_instance_assignment -name GLOBAL_SIGNAL "GLOBAL CLOCK" -to clk25
set_global_assignment -name OPTIMIZE_HOLD_TIMING "IO PATHS AND MINIMUM TPD PATHS"
set_global_assignment -name OPTIMIZE_MULTI_CORNER_TIMING ON
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name AUTO_GLOBAL_MEMORY_CONTROLS ON
set_global_assignment -name AUTO_DELAY_CHAINS_FOR_HIGH_FANOUT_INPUT_PINS ON
set_global_assignment -name USE_CONFIGURATION_DEVICE ON
set_global_assignment -name VERILOG_FILE src/keyboard/ps2tx.v
set_global_assignment -name VERILOG_FILE src/keyboard/ps2rx.v
set_global_assignment -name VERILOG_FILE "../verilog-osx/fifo_256x12.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/vga_bitstream.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/vga.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/fifo_1024x16.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/fifo_512x12_ram.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/fifo_512x12_lc.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/vga_writer.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/vga_sync.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/vga_reader.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/sdram_cntr.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/coordinator.v"
set_global_assignment -name VERILOG_FILE "../verilog-osx/converter.v"
set_global_assignment -name VECTOR_WAVEFORM_FILE clk50mhz.vwf
set_global_assignment -name VERILOG_FILE src/vector06cc.v
set_global_assignment -name VERILOG_FILE src/floppy/floppy.v
set_global_assignment -name VERILOG_FILE src/floppy/floppyram.v
set_global_assignment -name VHDL_FILE src/floppy/uart/txd.vhd
set_global_assignment -name VERILOG_FILE src/floppy/wd1793.v
set_global_assignment -name VERILOG_FILE src/floppy/floppyrom.v
set_global_assignment -name VERILOG_FILE src/floppy/ram512x8a.v
set_global_assignment -name VERILOG_FILE src/floppy/ram1024x8a.v
set_global_assignment -name VERILOG_FILE src/floppy/spi.v
set_global_assignment -name VERILOG_FILE src/floppy/dma_rw.v
set_global_assignment -name VERILOG_FILE src/floppy/timer100hz.v
set_global_assignment -name VHDL_FILE src/floppy/65c02/cpu65xx_en.vhd
set_global_assignment -name VERILOG_FILE src/ramdisk/kvaz.v
set_global_assignment -name VERILOG_FILE src/lpm_rom0.v
set_global_assignment -name VERILOG_FILE src/clockster.v
set_global_assignment -name VERILOG_FILE src/sram_map.v
set_global_assignment -name VERILOG_FILE src/singleclockster.v
set_global_assignment -name VERILOG_FILE src/oneshot.v
set_global_assignment -name VERILOG_FILE src/specialkeys.v
set_global_assignment -name VERILOG_FILE src/video/video.v
set_global_assignment -name VERILOG_FILE src/video/framebuffer.v
set_global_assignment -name VERILOG_FILE src/video/shiftreg2.v
set_global_assignment -name VERILOG_FILE src/video/rambuffer.v
set_global_assignment -name VERILOG_FILE src/video/vga_refresh.v
set_global_assignment -name VHDL_FILE src/i82c55/i82c55.vhd
set_global_assignment -name VERILOG_FILE src/i8253/8253.v
set_global_assignment -name VERILOG_FILE src/keyboard/scan2matrix.v
set_global_assignment -name VERILOG_FILE src/keyboard/vectorkeys.v
set_global_assignment -name VERILOG_FILE src/altmodules/mclk24mhz.v
set_global_assignment -name VERILOG_FILE src/altmodules/mclk14mhz.v
set_global_assignment -name VERILOG_FILE src/altmodules/palette_ram.v
set_global_assignment -name VERILOG_FILE src/DE1/I2C_AV_Config.v
set_global_assignment -name VERILOG_FILE src/DE1/USB_JTAG.v
set_global_assignment -name VERILOG_FILE src/DE1/CMD_Decode.v
set_global_assignment -name VERILOG_FILE src/DE1/I2C_Controller.v
set_global_assignment -name VERILOG_FILE src/DE1/CLK_LOCK.v
set_global_assignment -name VERILOG_FILE src/DE1/SEG7_LUT.v
set_global_assignment -name VERILOG_FILE src/DE1/audio_io.v
set_global_assignment -name VERILOG_FILE src/DE1/soundcodec.v
set_global_assignment -name VHDL_FILE src/T80/T80.vhd
set_global_assignment -name VHDL_FILE src/T80/T80_ALU.vhd
set_global_assignment -name VHDL_FILE src/T80/T80_MCode.vhd
set_global_assignment -name VHDL_FILE src/T80/T80_Pack.vhd
set_global_assignment -name VHDL_FILE src/T80/T80_Reg.vhd
set_global_assignment -name VHDL_FILE src/T80/T8080se.vhd
set_global_assignment -name VHDL_FILE src/T80/T80sef.vhd
set_global_assignment -name VERILOG_FILE src/jtag/jtag_top.v
set_global_assignment -name VERILOG_FILE src/ay/ayglue.v
set_global_assignment -name VHDL_FILE src/ay/YM2149_linmix.vhd
set_global_assignment -name VERILOG_FILE src/osd/textmode.v
set_global_assignment -name VERILOG_FILE src/osd/chargen.v
set_global_assignment -name VERILOG_FILE src/osd/screenbuffer.v
set_global_assignment -name VERILOG_FILE src/altmodules/ayclkdrv.v
set_global_assignment -name QIP_FILE pll_conv.qip
set_global_assignment -name CDF_FILE reports/vector06cc.cdf
set_global_assignment -name QIP_FILE src/altmodules/mclk24mhz2.qip
set_global_assignment -name QIP_FILE src/altmodules/mclk50mhz.qip
set_global_assignment -name SIGNALTAP_FILE vector06cc.stp
set_global_assignment -name SLD_FILE "Z:/workspace/vector06cc/vector06cc_auto_stripped.stp"
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[4]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[6]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[8]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[10]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[12]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[14]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[16]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to GPIO_1[18]
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top