diff --git a/.gitignore b/.gitignore index 2cb4a18e3c..9947f2a951 100644 --- a/.gitignore +++ b/.gitignore @@ -424,6 +424,9 @@ language.settings.xml /**/build /**/build-** +# Any generated directories +/**/generated + # Exception: vendored wolfGlass SBOM integration sources. # This directory contains tracked Make/CMake fragments, not generated output. !/tools/sbom/build/ diff --git a/Makefile b/Makefile index ce668f0e84..ea19e7bf2b 100644 --- a/Makefile +++ b/Makefile @@ -529,12 +529,39 @@ wolfboot.efi: wolfboot.elf $(Q)$(SIZE) wolfboot.efi @echo +ifeq ($(TARGET),ti_am64x_r5) +$(GENERATED_SRCS): + @echo "\t[TI SYSCONFIG] generated/hal/" + $(Q)$(TI_SYSCONFIG)/nodejs/node \ + $(TI_SYSCONFIG)/dist/cli.js -q \ + --product $(TI_MCU_PLUS_SDK)/.metadata/product.json \ + --context r5fss0-0 --part Default --package ALV \ + --output generated/hal/ \ + config/examples/ti-am64x-r5/ti-am64x-r5_hal.syscfg +endif + wolfboot.bin: wolfboot.elf +ifeq ($(TARGET),ti_am64x_r5) + @echo "\t[BIN] wolfboot.tmp" + $(Q)$(OBJCOPY) $(OBJCOPY_FLAGS) -O binary $^ wolfboot.tmp + @echo "\t[TI BIN] ROM-bootable image: wolfboot.bin" + $(Q)python3 $(TI_MCU_PLUS_SDK)/source/security/security_common/tools/boot/signing/rom_image_gen.py \ + --swrv 1 \ + --sbl-bin wolfboot.tmp \ + --sysfw-bin $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sysfw-hs-fs-enc.bin \ + --sysfw-inner-cert $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sysfw-hs-fs-enc-cert.bin \ + --boardcfg-blob $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_default_boardcfg/am64x/boardcfg_blob.bin \ + --sbl-loadaddr 0x70000000 --sysfw-loadaddr 0x44000 --bcfg-loadaddr 0x7B000 \ + --key $(TI_MCU_PLUS_SDK)/source/security/security_common/tools/boot/signing/rom_degenerateKey.pem \ + --rom-image $@ + $(Q)rm -f wolfboot.tmp +else @echo "\t[BIN] $@" $(Q)$(OBJCOPY) $(OBJCOPY_FLAGS) -O binary $^ $@ ifeq ($(TARGET),nxp_lpc54s0xx) @echo "\t[LPC] enhanced boot block" $(Q)python3 tools/scripts/lpc54s0xx_patch_boot_block.py $@ +endif endif @echo @echo "\t[SIZE]" @@ -681,9 +708,13 @@ endif test-app/image.elf: wolfboot.elf $(Q)$(MAKE) -C test-app WOLFBOOT_ROOT="$(WOLFBOOT_ROOT)" ELF_FLASH_SCATTER="$(ELF_FLASH_SCATTER)" LIBERO_FPGA_CONFIG_DIR="$(LIBERO_FPGA_CONFIG_DIR)" WOLFHSM_MICROCHIP_PIC32CZ="$(WOLFHSM_MICROCHIP_PIC32CZ)" image.elf +ifneq (,$(filter 1,$(ELF_FLASH_SCATTER))$(filter ti_am64x_r5,$(TARGET))) + $(Q)$(SIZE) test-app/image-orig.elf +else $(Q)$(SIZE) test-app/image.elf +endif -ifeq ($(ELF_FLASH_SCATTER),1) +ifneq (,$(filter 1,$(ELF_FLASH_SCATTER))$(filter ti_am64x_r5,$(TARGET))) test-app/image.elf: squashelf endif @@ -815,6 +846,7 @@ clean: $(Q)rm -f test-lib $(Q)rm -f lib-fs $(Q)rm -f libwolfboot.a + $(Q)rm -rf generated $(Q)$(MAKE) -C test-app clean V=$(V) $(Q)$(MAKE) -C tools/check_config -s clean $(Q)$(MAKE) -C stage1 -s clean diff --git a/arch.mk b/arch.mk index 88725b9d41..efce43e0b2 100644 --- a/arch.mk +++ b/arch.mk @@ -612,7 +612,6 @@ ifeq ($(ARCH),ARM) ifneq ($(DEBUG),0) CFLAGS+=-DPKCS11_SMALL endif - endif ifeq ($(TARGET),stm32n6) @@ -756,8 +755,15 @@ ifeq ($(ARCH),ARM) endif ## Cortex CPU - -ifeq ($(CORTEX_A5),1) +ifeq ($(CORTEX_R5),1) + CFLAGS+=-mcpu=cortex-r5 -DCORTEX_R5 + LDFLAGS+=-mcpu=cortex-r5 + ifeq ($(NO_ASM),1) + ifeq ($(SPMATH),1) + MATH_OBJS += $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/sp_c32.o + endif + endif +else ifeq ($(CORTEX_A5),1) FPU=-mfpu=vfp4-d16 CFLAGS+=-mcpu=cortex-a5 -mtune=cortex-a5 -static -z noexecstack \ -mno-unaligned-access @@ -1801,6 +1807,145 @@ ifeq ($(TARGET),ti_hercules) OPTIMIZATION_LEVEL=2 endif +ifeq ($(TARGET),ti_am64x_r5) + TI_MCU_PLUS_SDK=$(abspath $(wildcard $(PWD)/../TI/mcu_plus_sdk_am64x_*)) + ifeq ($(TI_MCU_PLUS_SDK),) + $(error "No sdk found at $(PWD)/../TI/mcu_plus_sdk_am64x_*") + endif + + TI_MPSDK_VERSION=$(shell grep version $(TI_MCU_PLUS_SDK)/.metadata/product.json | cut -c17-24) + ifneq ($(TI_MPSDK_VERSION),$(TI_MCU_PLUS_SDK_VERSION_REQUIRED)) + $(error "TI MCU Plus SDK version $(TI_MCU_PLUS_SDK_VERSION_REQUIRED) required") + endif + + TI_SYSCONFIG=$(abspath $(wildcard $(PWD)/../TI/tools/sysconfig_*)) + ifeq ($(TI_SYSCONFIG),) + $(error "No sysconfig found at $(PWD)/../TI/tools/sysconfig_*") + endif + + CROSS_COMPILE_PATH=$(abspath $(wildcard $(PWD)/../TI/tools/ti-cgt-armllvm_*)) + ifeq ($(CROSS_COMPILE_PATH),) + $(error "No toolchain found at $(PWD)/../TI/tools/ti-cgt-armllvm_*") + endif + + ARCH_FLASH_OFFSET=0x60000000 + USE_GCC_HEADLESS=0 + + CROSS_COMPILE=$(CROSS_COMPILE_PATH)/bin + CC=$(CROSS_COMPILE)/tiarmclang + LD=$(CROSS_COMPILE)/tiarmclang + AS=$(CROSS_COMPILE)/tiarmasm + AR=$(CROSS_COMPILE)/tiarmar rc + OBJCOPY=$(CROSS_COMPILE)/tiarmobjcopy + SIZE=$(CROSS_COMPILE)/tiarmsize + OUTPUT_FLAG=-o + OPTIMIZATION_LEVEL=s + + CFLAGS+=-DSOC_AM64X -DOS_NORTOS + CFLAGS+=-DTI_MCU_PLUS_SDK + CFLAGS+=-DWOLFBOOT_USE_STDLIBC + CFLAGS+=-DWOLFSSL_USE_ALIGN + CFLAGS+=-Wno-main-return-type -Wno-extra + CFLAGS+=\ + -I$(CROSS_COMPILE_PATH)/include/c \ + -I$(TI_MCU_PLUS_SDK)/source \ + -I$(TI_MCU_PLUS_SDK)/source/kernel/dpl \ + -I$(TI_MCU_PLUS_SDK)/source/security + + LDFLAGS+=\ + -Wl,--diag_suppress=10063 \ + -Wl,--ram_model \ + -Wl,--reread_libs \ + -Wl,-i$(CROSS_COMPILE_PATH)/lib + LD_START_GROUP= + LD_END_GROUP=-Wl,$(LSCRIPT) -Wl,-m=wolfboot.map + + LIBS+=-llibc.a -llibsysbm.a + + GENERATED_SRCS= + GENERATED_SRCS+=generated/hal/ti_board_config.c + GENERATED_SRCS+=generated/hal/ti_board_open_close.c + GENERATED_SRCS+=generated/hal/ti_dpl_config.c + GENERATED_SRCS+=generated/hal/ti_drivers_config.c + GENERATED_SRCS+=generated/hal/ti_drivers_open_close.c + GENERATED_SRCS+=generated/hal/ti_pinmux_config.c + GENERATED_SRCS+=generated/hal/ti_power_clock_config.c + + UPDATE_OBJS:=src/update_ram.o + CFLAGS+=-DWOLFBOOT_DUALBOOT -DWOLFBOOT_NO_RAMBOOT + + OBJS+=$(patsubst %.c,%.o,$(GENERATED_SRCS)) + OBJS+=\ + $(TI_MCU_PLUS_SDK)/source/board/flash/flash.o \ + $(TI_MCU_PLUS_SDK)/source/board/flash/ospi/flash_nor_ospi.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/bootloader/soc/am64x_am243x/bootloader_soc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/ospi_phy_dqs.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/ospi_v0.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/dma/udma/ospi_udma_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/ospi_phy_dqs_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/ospi_v0_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/ospi_tuning/ospi_tuning_algo/algo_v1/ospi_phy_tuning.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_boardcfg.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_firewall.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_procboot.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/firewall/v0/firewall.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/pinmux/am64x_am243x/pinmux.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/qos/v0/qos.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/csl_sec_proxy.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_pm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_rm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_rm_irq.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sciclient_fmwSecureProxyMap.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sciclient_irq_rm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sciclient_soc_priv.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/soc/am64x_am243x/soc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/uart_v0.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/lld/uart_v0_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/lld/dma/soc/am64x_am243x/uart_dma_soc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/lld/dma/udma/uart_dma_udma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_bcdma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_intaggr.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_lcdma_ringacc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_pktdma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/soc/udma_rmcfg_common.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/soc/am64x_am243x/udma_rmcfg.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/soc/am64x_am243x/udma_soc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_ch.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_event.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_flow.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_ring_common.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_ring_lcdma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_rm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_utils.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/AddrTranslateP.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/ClockP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/DebugP_log.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/DebugP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/DebugP_uartLogWriter.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/printf.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/SemaphoreP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/TaskP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/TimerP.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/boot_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/boot_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/CacheP_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/CacheP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/ClockP_nortos_r5.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_handlers_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_handlers_nortos_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_vectors_nortos_sbl_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_vim.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/MpuP_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/MpuP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/Mutex_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/PmuP_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/PmuP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/security/security_common/drivers/crypto/rng/rng.o +endif + ifeq ($(TARGET),lpc) ifeq ($(MCUXSDK),1) # Some targets in the SDK use drivers from a different target diff --git a/config/examples/ti-am64x-r5.config b/config/examples/ti-am64x-r5.config new file mode 100644 index 0000000000..ee1c33cb63 --- /dev/null +++ b/config/examples/ti-am64x-r5.config @@ -0,0 +1,40 @@ +ARCH?=ARM +TARGET?=ti_am64x_r5 +SIGN?=ECC256 +HASH?=SHA256 +CORTEX_R5?=1 +USE_GCC?=0 +TI_MCU_PLUS_SDK_VERSION_REQUIRED=11.02.00 +DEBUG?=0 +DEBUG_UART?=1 +VTOR?=1 +NO_ASM?=1 +NO_ARM_ASM=1 +NO_MPU=1 +EXT_FLASH?=0 +SPI_FLASH?=0 +NO_XIP?=1 +ALLOW_DOWNGRADE?=0 +NVM_FLASH_WRITEONCE?=1 +WOLFBOOT_VERSION?=0 +V?=0 +SPMATH?=1 +RAM_CODE?=0 +DUALBANK_SWAP?=0 +FLASH_MULTI_SECTOR_ERASE?=0 +ELF?=1 + +PKA?=0 + +WOLFBOOT_SECTOR_SIZE?=0x40000 + +# Default configuration +WOLFBOOT_PARTITION_SIZE?=0x100000 +WOLFBOOT_PARTITION_BOOT_ADDRESS?=0x60080000 +WOLFBOOT_PARTITION_UPDATE_ADDRESS?=0x60180000 +WOLFBOOT_PARTITION_SWAP_ADDRESS?=0x60280000 + +WOLFBOOT_LOAD_ADDRESS?=0x70080000 + +WOLFCRYPT_TEST?=1 +WOLFCRYPT_BENCHMARK?=1 diff --git a/config/examples/ti-am64x-r5/mcuplussdk_11.02.00_sa2ul.c.patch b/config/examples/ti-am64x-r5/mcuplussdk_11.02.00_sa2ul.c.patch new file mode 100644 index 0000000000..2050005614 --- /dev/null +++ b/config/examples/ti-am64x-r5/mcuplussdk_11.02.00_sa2ul.c.patch @@ -0,0 +1,38 @@ +--- a/sa2ul.c 2026-08-05 22:36:06.345330013 -0400 ++++ b/sa2ul.c 2026-08-06 18:28:41.124171790 -0400 +@@ -1123,7 +1123,7 @@ + sc.u.auth.authCtx1 = + CSL_FMK(SA2UL_AUTHCTX1_MODESEL, 0u) | + CSL_FMK(SA2UL_AUTHCTX1_DEFAULT_NEXT_ENGINE_ID, SA2UL_ENGINE_CODE_DEFAULT_EGRESS_PORT) | +- CSL_FMK(SA2UL_AUTHCTX1_SW_CONTROL, 0x40u | ctxObj->ctxPrms.hashAlg); ++ CSL_FMK(SA2UL_AUTHCTX1_SW_CONTROL, 0xc0u | ctxObj->ctxPrms.hashAlg); + + /* Authentication length in bits for basic hash, length in bits */ + sc.u.auth.authenticationLengthLo = authLen; +@@ -1208,7 +1208,7 @@ + else + { + /* Copy IV */ +- SA2UL_u8LeToU32(sc.u.enc.encAux3, ctxObj->ctxPrms.iv,SA2UL_MAX_IV_SIZE_BYTES); ++ SA2UL_u8LeToU32(sc.u.enc.encAux2, ctxObj->ctxPrms.iv,SA2UL_MAX_IV_SIZE_BYTES); + } + + sc.scctl.scctl1 = +@@ -1873,7 +1873,7 @@ + txDescr->exPktInfo.swWord0 |= (CSL_FMK(SA2UL_SWWORD0_BYP_CMD_LBL_LEN, 1u) | CSL_FMK(SA2UL_SWWORD0_FRAGMENT, 1u)); + } + +- if(pCtxObj->ctxPrms.inputLen > CSL_FEXT(0xffffffffu, SA2UL_CMDLBLHDR1_LEN_TO_BE_PROCESSESED)) ++// if(pCtxObj->ctxPrms.inputLen > CSL_FEXT(0xffffffffu, SA2UL_CMDLBLHDR1_LEN_TO_BE_PROCESSESED)) + { + /* Update protocol specific data length, add 8 */ + CSL_FINS(txDescr->pd.descInfo, +@@ -2026,7 +2026,7 @@ + reg = CSL_FEXT(rxDescr->pd.descInfo, PKTDMA_CPPI5_PD_DESCINFO_PKTLEN); + pCtxObj->rxBytesCnt += reg; + +- if(pCtxObj->rxBytesCnt == pCtxObj->ctxPrms.inputLen) ++// if(pCtxObj->rxBytesCnt == pCtxObj->ctxPrms.inputLen) + { + if(pCtxObj->ctxPrms.opType == SA2UL_OP_AUTH) + { diff --git a/config/examples/ti-am64x-r5/ti-am64x-r5_hal.syscfg b/config/examples/ti-am64x-r5/ti-am64x-r5_hal.syscfg new file mode 100644 index 0000000000..10e0185c53 --- /dev/null +++ b/config/examples/ti-am64x-r5/ti-am64x-r5_hal.syscfg @@ -0,0 +1,242 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM64x" --part "Default" --package "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM64x@11.02.00" + * @v2CliArgs --device "AM6442" --package "FCBGA (ALV)" --variant "AM6442-D" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM64x@11.02.00" + * @versions {"tool":"1.25.0+4268"} + */ +scripting.excludeFromBuild("ti_enet_config.c"); +scripting.excludeFromBuild("ti_enet_config.h"); +scripting.excludeFromBuild("ti_enet_init.c"); +scripting.excludeFromBuild("ti_enet_dma_init.h"); +scripting.excludeFromBuild("ti_enet_dma_init.c"); +scripting.excludeFromBuild("ti_enet_open_close.c"); +scripting.excludeFromBuild("ti_enet_open_close.h"); +scripting.excludeFromBuild("ti_enet_soc.c"); +scripting.excludeFromBuild("ti_enet_lwipif.c"); +scripting.excludeFromBuild("ti_enet_lwipif.h"); +scripting.excludeFromBuild("ti_usb_descriptor.c"); +scripting.excludeFromBuild("ti_usb_config.h"); +scripting.excludeFromBuild("linker.cmd"); +scripting.excludeFromBuild("linker_defines.h"); + +/** + * Import the modules used in this configuration. + */ +const flash = scripting.addModule("/board/flash/flash", {}, false); +const flash1 = flash.addInstance(); +const bootloader = scripting.addModule("/drivers/bootloader/bootloader", {}, false); +const bootloader1 = bootloader.addInstance(); +const qos = scripting.addModule("/drivers/qos/qos", {}, false); +const qos1 = qos.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const dpl_cfg = scripting.addModule("/kernel/dpl/dpl_cfg"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false); +const default_linker1 = default_linker.addInstance(); +const general = scripting.addModule("/memory_configurator/general", {}, false); +const general1 = general.addInstance(); +const region = scripting.addModule("/memory_configurator/region", {}, false); +const region1 = region.addInstance(); +const section = scripting.addModule("/memory_configurator/section", {}, false); +const section1 = section.addInstance(); +const section2 = section.addInstance(); +const section3 = section.addInstance(); +const section4 = section.addInstance(); +const section5 = section.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +bootloader1.appImageOffset = "0x80000"; +bootloader1.$name = "CONFIG_BOOTLOADER_FLASH0"; +bootloader1.appImageBaseAddress = "0x60080000"; + +flash1.$name = "CONFIG_FLASH0"; +bootloader1.flashDriver = flash1; +flash1.peripheralDriver.$name = "CONFIG_OSPI0"; +flash1.peripheralDriver.phyEnable = true; +flash1.peripheralDriver.advanced = true; +flash1.peripheralDriver.inputClkFreq = 166666666; +flash1.peripheralDriver.dmaEnable = true; +flash1.peripheralDriver.child.$name = "drivers_ospi_v0_ospi_v0_template0"; + +qos1.$name = "CONFIG_QOS0"; + +const udma = scripting.addModule("/drivers/udma/udma", {}, false); +const udma1 = udma.addInstance({}, false); +udma1.$name = "CONFIG_UDMA0"; +flash1.peripheralDriver.udmaDriver = udma1; + +debug_log.enableUartLog = true; +debug_log.enableCssLog = false; +debug_log.uartLog.$name = "CONFIG_UART0"; +debug_log.uartLog.intrEnable = "DISABLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false); +const uart_v0_template1 = uart_v0_template.addInstance({}, false); +uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0"; +debug_log.uartLog.child = uart_v0_template1; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; + +mpu_armv75.$name = "CONFIG_MPU_REGION4"; +mpu_armv75.baseAddr = 0x80000000; +mpu_armv75.size = 31; + +default_linker1.$name = "memory_configurator_default_linker0"; + +general1.$name = "CONFIG_GENERAL0"; +general1.entry_point = "-e_vectors_sbl"; +general1.irq_stack_size = 4096; +general1.svc_stack_size = 256; +general1.linker.$name = "TIARMCLANG0"; + +region1.$name = "MEMORY_REGION_CONFIGURATION0"; +region1.memory_region.create(7); +region1.memory_region[0].type = "TCMA_R5F"; +region1.memory_region[0].$name = "R5F_VECS"; +region1.memory_region[0].size = 0x40; +region1.memory_region[0].auto = false; +region1.memory_region[1].type = "TCMA_R5F"; +region1.memory_region[1].$name = "R5F_TCMA"; +region1.memory_region[1].size = 0x7FC0; +region1.memory_region[2].type = "TCMB_R5F"; +region1.memory_region[2].$name = "R5F_TCMB0"; +region1.memory_region[2].size = 0x8000; +region1.memory_region[3].$name = "MSRAM_VECS"; +region1.memory_region[3].auto = false; +region1.memory_region[3].size = 0x100; +region1.memory_region[4].$name = "MSRAM_0"; +region1.memory_region[4].auto = false; +region1.memory_region[4].manualStartAddress = 0x70000100; +region1.memory_region[4].size = 0x6FF00; +region1.memory_region[5].$name = "MSRAM_1"; +region1.memory_region[5].auto = false; +region1.memory_region[5].size = 0x10000; +region1.memory_region[5].manualStartAddress = 0x70070000; +region1.memory_region[6].size = 0x800000; +region1.memory_region[6].type = "CUSTOM_ALL"; +region1.memory_region[6].auto = false; +region1.memory_region[6].manualStartAddress = 0x82000000; +region1.memory_region[6].$name = "APPIMAGE"; + +section1.$name = "Vector Table"; +section1.group = false; +section1.load_memory = "MSRAM_VECS"; +section1.output_section.create(1); +section1.output_section[0].$name = ".vectors"; +section1.output_section[0].palignment = true; + +section2.$name = "Text Segments"; +section2.load_memory = "MSRAM_0"; +section2.output_section.create(7); +section2.output_section[0].palignment = true; +section2.output_section[0].$name = ".text"; +section2.output_section[1].palignment = true; +section2.output_section[1].$name = ".text.hwi"; +section2.output_section[2].palignment = true; +section2.output_section[2].$name = ".text.cache"; +section2.output_section[3].palignment = true; +section2.output_section[3].$name = ".text.mpu"; +section2.output_section[4].palignment = true; +section2.output_section[4].$name = ".text.boot"; +section2.output_section[5].$name = ".data"; +section2.output_section[5].palignment = true; +section2.output_section[6].$name = ".rodata"; +section2.output_section[6].palignment = true; + +section3.$name = "Memory Segments"; +section3.group = false; +section3.load_memory = "MSRAM_1"; +section3.output_section.create(3); +section3.output_section[0].$name = ".bss"; +section3.output_section[0].palignment = true; +section3.output_section[0].output_sections_start = "__BSS_START"; +section3.output_section[0].output_sections_end = "__BSS_END"; +section3.output_section[1].$name = ".sysmem"; +section3.output_section[1].palignment = true; +section3.output_section[2].$name = ".stack"; +section3.output_section[2].palignment = true; + +section4.$name = "Stack Segments"; +section4.load_memory = "MSRAM_1"; +section4.output_section.create(5); +section4.output_section[0].$name = ".irqstack"; +section4.output_section[0].output_sections_start = "__IRQ_STACK_START"; +section4.output_section[0].output_sections_end = "__IRQ_STACK_END"; +section4.output_section[0].input_section.create(1); +section4.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;"; +section4.output_section[1].$name = ".fiqstack"; +section4.output_section[1].output_sections_start = "__FIQ_STACK_START"; +section4.output_section[1].output_sections_end = "__FIQ_STACK_END"; +section4.output_section[1].input_section.create(1); +section4.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;"; +section4.output_section[2].$name = ".svcstack"; +section4.output_section[2].output_sections_start = "__SVC_STACK_START"; +section4.output_section[2].output_sections_end = "__SVC_STACK_END"; +section4.output_section[2].input_section.create(1); +section4.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;"; +section4.output_section[3].$name = ".abortstack"; +section4.output_section[3].output_sections_start = "__ABORT_STACK_START"; +section4.output_section[3].output_sections_end = "__ABORT_STACK_END"; +section4.output_section[3].input_section.create(1); +section4.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;"; +section4.output_section[4].$name = ".undefinedstack"; +section4.output_section[4].output_sections_start = "__UNDEFINED_STACK_START"; +section4.output_section[4].output_sections_end = "__UNDEFINED_STACK_END"; +section4.output_section[4].input_section.create(1); +section4.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;"; + +section5.type = "NOLOAD"; +section5.load_memory = "APPIMAGE"; +section5.$name = "DDR"; +section5.group = false; +section5.output_section.create(1); +section5.output_section[0].$name = ".bss.app"; +section5.output_section[0].alignment = 0; +section5.output_section[0].macro_name = "BSSAPP_SECTION"; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +flash1.peripheralDriver.OSPI.$suggestSolution = "OSPI0"; +flash1.peripheralDriver.OSPI.CLK.$suggestSolution = "OSPI0_CLK"; +flash1.peripheralDriver.OSPI.CSn0.$suggestSolution = "OSPI0_CSn0"; +flash1.peripheralDriver.OSPI.DQS.$suggestSolution = "OSPI0_DQS"; +flash1.peripheralDriver.OSPI.D7.$suggestSolution = "OSPI0_D7"; +flash1.peripheralDriver.OSPI.D6.$suggestSolution = "OSPI0_D6"; +flash1.peripheralDriver.OSPI.D5.$suggestSolution = "OSPI0_D5"; +flash1.peripheralDriver.OSPI.D4.$suggestSolution = "OSPI0_D4"; +flash1.peripheralDriver.OSPI.D3.$suggestSolution = "OSPI0_D3"; +flash1.peripheralDriver.OSPI.D2.$suggestSolution = "OSPI0_D2"; +flash1.peripheralDriver.OSPI.D1.$suggestSolution = "OSPI0_D1"; +flash1.peripheralDriver.OSPI.D0.$suggestSolution = "OSPI0_D0"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/config/examples/ti-am64x-r5/ti-am64x-r5_test-app.syscfg b/config/examples/ti-am64x-r5/ti-am64x-r5_test-app.syscfg new file mode 100644 index 0000000000..8e33ad78c0 --- /dev/null +++ b/config/examples/ti-am64x-r5/ti-am64x-r5_test-app.syscfg @@ -0,0 +1,313 @@ +/** + * These arguments were used when this file was generated. They will be automatically applied on subsequent loads + * via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments. + * @cliArgs --device "AM64x" --part "Default" --package "ALV" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM64x@11.02.00" + * @v2CliArgs --device "AM6442" --package "FCBGA (ALV)" --variant "AM6442-D" --context "r5fss0-0" --product "MCU_PLUS_SDK_AM64x@11.02.00" + * @versions {"tool":"1.25.0+4268"} + */ +scripting.excludeFromBuild("ti_enet_config.c"); +scripting.excludeFromBuild("ti_enet_config.h"); +scripting.excludeFromBuild("ti_enet_init.c"); +scripting.excludeFromBuild("ti_enet_dma_init.h"); +scripting.excludeFromBuild("ti_enet_dma_init.c"); +scripting.excludeFromBuild("ti_enet_open_close.c"); +scripting.excludeFromBuild("ti_enet_open_close.h"); +scripting.excludeFromBuild("ti_enet_soc.c"); +scripting.excludeFromBuild("ti_enet_lwipif.c"); +scripting.excludeFromBuild("ti_enet_lwipif.h"); +scripting.excludeFromBuild("ti_usb_descriptor.c"); +scripting.excludeFromBuild("ti_usb_config.h"); +scripting.excludeFromBuild("linker.cmd"); +scripting.excludeFromBuild("linker_defines.h"); + +/** + * Import the modules used in this configuration. + */ +const flash = scripting.addModule("/board/flash/flash", {}, false); +const flash1 = flash.addInstance(); +const firewall = scripting.addModule("/drivers/firewall/firewall", {}, false); +const firewall1 = firewall.addInstance(); +const qos = scripting.addModule("/drivers/qos/qos", {}, false); +const qos1 = qos.addInstance(); +const debug_log = scripting.addModule("/kernel/dpl/debug_log"); +const dpl_cfg = scripting.addModule("/kernel/dpl/dpl_cfg"); +const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false); +const mpu_armv71 = mpu_armv7.addInstance(); +const mpu_armv72 = mpu_armv7.addInstance(); +const mpu_armv73 = mpu_armv7.addInstance(); +const mpu_armv74 = mpu_armv7.addInstance(); +const mpu_armv75 = mpu_armv7.addInstance(); +const default_linker = scripting.addModule("/memory_configurator/default_linker", {}, false); +const default_linker1 = default_linker.addInstance(); +const general = scripting.addModule("/memory_configurator/general", {}, false); +const general1 = general.addInstance(); +const region = scripting.addModule("/memory_configurator/region", {}, false); +const region1 = region.addInstance(); +const section = scripting.addModule("/memory_configurator/section", {}, false); +const section1 = section.addInstance(); +const section2 = section.addInstance(); +const section3 = section.addInstance(); +const section4 = section.addInstance(); +const section5 = section.addInstance(); +const section6 = section.addInstance(); +const section7 = section.addInstance(); +const section8 = section.addInstance(); +const section9 = section.addInstance(); +const section10 = section.addInstance(); +const section11 = section.addInstance(); +const crypto = scripting.addModule("/security/crypto/crypto", {}, false); +const crypto1 = crypto.addInstance(); + +/** + * Write custom configuration values to the imported modules. + */ +flash1.$name = "CONFIG_FLASH0"; +flash1.peripheralDriver.$name = "CONFIG_OSPI0"; +flash1.peripheralDriver.phyEnable = true; +flash1.peripheralDriver.advanced = true; +flash1.peripheralDriver.inputClkFreq = 166666666; +flash1.peripheralDriver.dmaEnable = true; +flash1.peripheralDriver.child.$name = "drivers_ospi_v0_ospi_v0_template0"; + +firewall1.$name = "CONFIG_FIREWALL0"; +firewall1.regCfg.create(1); +firewall1.regCfg[0].$name = "FWL_REG_CFG0"; +firewall1.regCfg[0].regIndex = 1; +firewall1.regCfg[0].instName = "SA2_UL0"; +firewall1.regCfg[0].interName = "MMRA"; +firewall1.regCfg[0].fwlCache = true; +firewall1.regCfg[0].fwlPriv1 = "MAIN_0_R5_0_SECURE"; + +qos1.$name = "CONFIG_QOS0"; + +const udma = scripting.addModule("/drivers/udma/udma", {}, false); +const udma1 = udma.addInstance({}, false); +udma1.$name = "CONFIG_UDMA0"; +flash1.peripheralDriver.udmaDriver = udma1; + +debug_log.enableUartLog = true; +debug_log.uartLog.$name = "CONFIG_UART_CONSOLE"; +debug_log.uartLog.UART.$assign = "USART0"; + +const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false); +const uart_v0_template1 = uart_v0_template.addInstance({}, false); +uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0"; +debug_log.uartLog.child = uart_v0_template1; + +mpu_armv71.$name = "CONFIG_MPU_REGION0"; +mpu_armv71.size = 31; +mpu_armv71.attributes = "Device"; +mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD"; +mpu_armv71.allowExecute = false; + +mpu_armv72.$name = "CONFIG_MPU_REGION1"; +mpu_armv72.size = 15; +mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv73.$name = "CONFIG_MPU_REGION2"; +mpu_armv73.baseAddr = 0x41010000; +mpu_armv73.size = 15; +mpu_armv73.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv74.$name = "CONFIG_MPU_REGION3"; +mpu_armv74.baseAddr = 0x70000000; +mpu_armv74.size = 21; +mpu_armv74.accessPermissions = "Supervisor RD+WR, User RD"; + +mpu_armv75.baseAddr = 0x80000000; +mpu_armv75.size = 31; +mpu_armv75.$name = "CONFIG_MPU_REGION4"; + +default_linker1.$name = "memory_configurator_default_linker0"; + +general1.$name = "CONFIG_GENERAL0"; +general1.linker.$name = "TIARMCLANG0"; + +region1.$name = "MEMORY_REGION_CONFIGURATION0"; +region1.memory_region.create(9); +region1.memory_region[0].type = "TCMA_R5F"; +region1.memory_region[0].$name = "R5F_VECS"; +region1.memory_region[0].size = 0x40; +region1.memory_region[0].auto = false; +region1.memory_region[1].type = "TCMA_R5F"; +region1.memory_region[1].$name = "R5F_TCMA"; +region1.memory_region[1].size = 0x7FC0; +region1.memory_region[2].type = "TCMB_R5F"; +region1.memory_region[2].$name = "R5F_TCMB0"; +region1.memory_region[2].size = 0x8000; +region1.memory_region[3].$name = "NON_CACHE_MEM"; +region1.memory_region[3].auto = false; +region1.memory_region[3].manualStartAddress = 0x70060000; +region1.memory_region[3].size = 0x8000; +region1.memory_region[4].$name = "MSRAM"; +region1.memory_region[4].auto = false; +region1.memory_region[4].manualStartAddress = 0x70080000; +region1.memory_region[4].size = 0x40000; +region1.memory_region[5].type = "FLASH"; +region1.memory_region[5].$name = "FLASH"; +region1.memory_region[5].auto = false; +region1.memory_region[5].manualStartAddress = 0x60100000; +region1.memory_region[5].size = 0x80000; +region1.memory_region[6].$name = "USER_SHM_MEM"; +region1.memory_region[6].auto = false; +region1.memory_region[6].manualStartAddress = 0x701D0000; +region1.memory_region[6].size = 0x80; +region1.memory_region[6].isShared = true; +region1.memory_region[6].shared_cores = ["a53ss0-0","a53ss0-1","m4fss0-0","r5fss0-1","r5fss1-0","r5fss1-1"]; +region1.memory_region[7].auto = false; +region1.memory_region[7].manualStartAddress = 0x701D0080; +region1.memory_region[7].size = 0x3F80; +region1.memory_region[7].$name = "LOG_SHM_MEM"; +region1.memory_region[7].isShared = true; +region1.memory_region[7].shared_cores = ["a53ss0-0","a53ss0-1","m4fss0-0","r5fss0-1","r5fss1-0","r5fss1-1"]; +region1.memory_region[8].auto = false; +region1.memory_region[8].manualStartAddress = 0x701D4000; +region1.memory_region[8].size = 0xC000; +region1.memory_region[8].$name = "RTOS_NORTOS_IPC_SHM_MEM"; +region1.memory_region[8].isShared = true; +region1.memory_region[8].shared_cores = ["a53ss0-0","a53ss0-1","m4fss0-0","r5fss0-1","r5fss1-0","r5fss1-1"]; + +section1.$name = "Vector Table"; +section1.load_memory = "R5F_VECS"; +section1.group = false; +section1.output_section.create(1); +section1.output_section[0].$name = ".vectors"; +section1.output_section[0].palignment = true; + +section2.$name = "Text Segments"; +section2.load_memory = "MSRAM"; +section2.output_section.create(5); +section2.output_section[0].$name = ".text.hwi"; +section2.output_section[0].palignment = true; +section2.output_section[1].$name = ".text.cache"; +section2.output_section[1].palignment = true; +section2.output_section[2].$name = ".text.mpu"; +section2.output_section[2].palignment = true; +section2.output_section[3].$name = ".text.boot"; +section2.output_section[3].palignment = true; +section2.output_section[4].$name = ".text:abort"; +section2.output_section[4].palignment = true; + +section3.$name = "Code and Read-Only Data"; +section3.load_memory = "MSRAM"; +section3.output_section.create(2); +section3.output_section[0].$name = ".text"; +section3.output_section[0].palignment = true; +section3.output_section[1].$name = ".rodata"; +section3.output_section[1].palignment = true; + +section4.$name = "Data Segment"; +section4.load_memory = "MSRAM"; +section4.output_section.create(1); +section4.output_section[0].$name = ".data"; +section4.output_section[0].palignment = true; + +section5.$name = "Memory Segments"; +section5.load_memory = "MSRAM"; +section5.output_section.create(3); +section5.output_section[0].$name = ".bss"; +section5.output_section[0].palignment = true; +section5.output_section[0].output_sections_start = "__BSS_START"; +section5.output_section[0].output_sections_end = "__BSS_END"; +section5.output_section[1].$name = ".sysmem"; +section5.output_section[1].palignment = true; +section5.output_section[2].$name = ".stack"; +section5.output_section[2].palignment = true; + +section6.$name = "Stack Segments"; +section6.load_memory = "MSRAM"; +section6.output_section.create(5); +section6.output_section[0].$name = ".irqstack"; +section6.output_section[0].output_sections_start = "__IRQ_STACK_START"; +section6.output_section[0].output_sections_end = "__IRQ_STACK_END"; +section6.output_section[0].input_section.create(1); +section6.output_section[0].input_section[0].$name = ". = . + __IRQ_STACK_SIZE;"; +section6.output_section[1].$name = ".fiqstack"; +section6.output_section[1].output_sections_start = "__FIQ_STACK_START"; +section6.output_section[1].output_sections_end = "__FIQ_STACK_END"; +section6.output_section[1].input_section.create(1); +section6.output_section[1].input_section[0].$name = ". = . + __FIQ_STACK_SIZE;"; +section6.output_section[2].$name = ".svcstack"; +section6.output_section[2].output_sections_start = "__SVC_STACK_START"; +section6.output_section[2].output_sections_end = "__SVC_STACK_END"; +section6.output_section[2].input_section.create(1); +section6.output_section[2].input_section[0].$name = ". = . + __SVC_STACK_SIZE;"; +section6.output_section[3].$name = ".abortstack"; +section6.output_section[3].output_sections_start = "__ABORT_STACK_START"; +section6.output_section[3].output_sections_end = "__ABORT_STACK_END"; +section6.output_section[3].input_section.create(1); +section6.output_section[3].input_section[0].$name = ". = . + __ABORT_STACK_SIZE;"; +section6.output_section[4].$name = ".undefinedstack"; +section6.output_section[4].output_sections_start = "__UNDEFINED_STACK_START"; +section6.output_section[4].output_sections_end = "__UNDEFINED_STACK_END"; +section6.output_section[4].input_section.create(1); +section6.output_section[4].input_section[0].$name = ". = . + __UNDEFINED_STACK_SIZE;"; + +section7.$name = "Initialization and Exception Handling"; +section7.load_memory = "MSRAM"; +section7.output_section.create(3); +section7.output_section[0].$name = ".ARM.exidx"; +section7.output_section[0].palignment = true; +section7.output_section[1].$name = ".init_array"; +section7.output_section[1].palignment = true; +section7.output_section[2].$name = ".fini_array"; +section7.output_section[2].palignment = true; + +section8.$name = "User Shared Memory"; +section8.type = "NOLOAD"; +section8.load_memory = "USER_SHM_MEM"; +section8.group = false; +section8.output_section.create(1); +section8.output_section[0].$name = ".bss.user_shared_mem"; +section8.output_section[0].alignment = 0; + +section9.$name = "Log Shared Memory"; +section9.load_memory = "LOG_SHM_MEM"; +section9.type = "NOLOAD"; +section9.group = false; +section9.output_section.create(1); +section9.output_section[0].$name = ".bss.log_shared_mem"; +section9.output_section[0].alignment = 0; + +section10.$name = "IPC Shared Memory"; +section10.type = "NOLOAD"; +section10.load_memory = "RTOS_NORTOS_IPC_SHM_MEM"; +section10.group = false; +section10.output_section.create(1); +section10.output_section[0].$name = ".bss.ipc_vring_mem"; +section10.output_section[0].alignment = 0; + +section11.$name = "Non Cacheable Memory"; +section11.load_memory = "NON_CACHE_MEM"; +section11.group = false; +section11.type = "NOLOAD"; +section11.output_section.create(1); +section11.output_section[0].$name = ".bss.nocache"; +section11.output_section[0].alignment = 0; + +crypto1.$name = "CONFIG_CRYPTO0"; +crypto1.sa2ul.$name = "CONFIG_SA2UL0"; + +const udma2 = udma.addInstance({}, false); +udma2.$name = "CONFIG_UDMA1"; +crypto1.sa2ul.udmaPKTDMA = udma2; + +/** + * Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future + * version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to + * re-solve from scratch. + */ +flash1.peripheralDriver.OSPI.$suggestSolution = "OSPI0"; +flash1.peripheralDriver.OSPI.CLK.$suggestSolution = "OSPI0_CLK"; +flash1.peripheralDriver.OSPI.CSn0.$suggestSolution = "OSPI0_CSn0"; +flash1.peripheralDriver.OSPI.DQS.$suggestSolution = "OSPI0_DQS"; +flash1.peripheralDriver.OSPI.D7.$suggestSolution = "OSPI0_D7"; +flash1.peripheralDriver.OSPI.D6.$suggestSolution = "OSPI0_D6"; +flash1.peripheralDriver.OSPI.D5.$suggestSolution = "OSPI0_D5"; +flash1.peripheralDriver.OSPI.D4.$suggestSolution = "OSPI0_D4"; +flash1.peripheralDriver.OSPI.D3.$suggestSolution = "OSPI0_D3"; +flash1.peripheralDriver.OSPI.D2.$suggestSolution = "OSPI0_D2"; +flash1.peripheralDriver.OSPI.D1.$suggestSolution = "OSPI0_D1"; +flash1.peripheralDriver.OSPI.D0.$suggestSolution = "OSPI0_D0"; +debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD"; +debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD"; diff --git a/docs/Targets.md b/docs/Targets.md index c91d0f4d71..28f8d87be2 100644 --- a/docs/Targets.md +++ b/docs/Targets.md @@ -64,6 +64,7 @@ This README describes configuration of supported targets. * [STM32L5](#stm32l5) * [STM32U5](#stm32u5) * [STM32WB55](#stm32wb55) +* [TI AM6442](#ti-am6442) * [TI C2000 C28x (LAUNCHXL-F28P55X)](#ti-c2000-c28x-launchxl-f28p55x) * [TI Hercules TMS570LC435](#ti-hercules-tms570lc435) * [Vorago VA416x0](#vorago-va416x0) @@ -7479,8 +7480,6 @@ cmd> See [/config/examples/ti-tms570lc435.config](/config/examples/ti-tms570lc435.config) for example configuration. - - ## Nordic nRF52840 We have full Nordic nRF5280 examples for Contiki and RIOT-OS in our [wolfBoot-examples repo](https://github.com/wolfSSL/wolfboot-examples) @@ -9856,6 +9855,73 @@ The difference between the two timestamps is the cost of everything wolfBoot doe Both caches are enabled by `hal_init()`, which matters because verifying an image means hashing megabytes resident in DDR. The ARMv7-M default memory map marks `0x80000000-0x9FFFFFFF` as Normal write-through, so no MPU region is needed and M7 stores to the shared window still reach DDR; the HAL nevertheless cleans the affected lines explicitly so that behaviour is not left depending on an inherited attribute. +## TI AM6442 + +The TI AM6442 is a multi-core SoC, with one dual-core Cortex-A53, two dual-core Cortex-R5F, +a Cortex-M4F, and a dedicated security core based on a Cortex-M3. This support has been +tested on the TMDS64EVM board (rev 101D). + +### AM64x: Setup Software Tools + +Software builds require the TI MCU Plus SDK and the TI Arm Clang toolchain, plus +a couple other TI tools. + +Download the SDK: +[MCU Plus SDK for AM64x v11.02](https://dr-download.ti.com/software-development/software-development-kit-sdk/MD-SfkcjYAjGS/11.02.00.24/mcu_plus_sdk_am64x_11_02_00_24-linux-x64-installer.run) + +To set up the TI SDK and toolchain: + +``` +# from the wolfBoot directory... +mkdir ../TI +cd ../TI + +# Install SDK +/path/to/mcu_plus_sdk_am64x_11_02_00_24-linux-x64-installer.run --mode unattended --prefix . + +# Clone the setup repo +git clone --branch REL.MCUSDK.K3.11.02.00.24 https://github.com/TexasInstruments/mcupsdk-setup.git + +# Run the download_components.sh script +chmod +x mcupsdk-setup/releases/11_02_00/am64x/download_components.sh +mcupsdk-setup/releases/11_02_00/am64x/download_components.sh --install_dir=./tools --skip_nodejs=true --skip_doxygen=true --skip_ccs=true +``` + +### AM64x: Hardware Acceleration + +wolfBoot / wolfCrypt provide support for the TI AM64x hardware acceleration +blocks via the device's SA2UL peripheral. By default, this +support is turned off in the config files, and all crypto is software based. +To turn on hardware acceleration, set PKA=1 in the config file. + +Basic hardware acceleration supported: +- AES-CBC (128, 256 key sizes) +- AES-ECB (128, 256 key sizes) +- AES-GCM (128, 256 key sizes) +- SHA-256, SHA-512 + +### AM64x: Configuring and compiling + +Copy the example configuration file and build with make: + +```sh +cd /path/to/wolfBoot +cp config/examples/ti-am64x-r5.config .config +make clean +make +``` + +### AM64x: Loading the firmware + +The AM64x wolfBoot port for the TMDS64EVM boots from OSPI flash and runs on the main R5 core. There are several ways to flash the device, such as over UART or USB DFU. The preferred method is up to the user. Refer to the MCU Plus SDK and the TMDS64EVM documentation. + +The 'factory.bin' file needs to be flashed to the start of the OSPI flash. + +The boot switches then must be set to xSPI boot mode: +```sh +11001110 01000000 +``` + ## TI C2000 C28x (LAUNCHXL-F28P55X) wolfBoot runs on the Texas Instruments C2000 C28x DSP (TMS320F28P550SJ, 150 MHz) as a secure execute-in-place (XIP) bootloader. The C28x is word-addressed with `CHAR_BIT == 16` (no 8-bit type -- each octet occupies one 16-bit cell), built with the TI `cl2000` toolchain against wolfSSL's wide-byte (`CHAR_BIT != 8`) support. diff --git a/hal/ti_am64x_r5.c b/hal/ti_am64x_r5.c new file mode 100644 index 0000000000..5be7870c7c --- /dev/null +++ b/hal/ti_am64x_r5.c @@ -0,0 +1,338 @@ +/* ti_am64x_r5.c + * + * Copyright (C) 2026 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +#include +#include +#include +#include "image.h" +#include "loader.h" + +#include + +#include "DebugP.h" +#include "board/flash.h" +#include "drivers/sciclient.h" +#include "drivers/ospi.h" +#include "drivers/bootloader/soc/am64x_am243x/bootloader_soc.h" +#include "kernel/dpl/ClockP.h" +#include "security/security_common/drivers/crypto/rng/rng.h" +#include "security/security_common/drivers/crypto/sa2ul/sa2ul.h" + +void System_init(void); +void Drivers_open(void); +int32_t Board_driversOpen(void); +extern OSPI_Handle gOspiHandle[1]; +extern Flash_Handle gFlashHandle[1]; + +#ifndef __WOLFBOOT +#include +void putchar__(char character); +void putchar__(char character) +{ + /* Output to CCS console */ + putchar(character); + /* Output to UART console */ + if (character == '\n') + DebugP_uartLogWriterPutChar('\r'); + DebugP_uartLogWriterPutChar(character); +} +#endif + +static void flashFixUpOspiBoot(OSPI_Handle oHandle) +{ + int32_t status = SystemP_FAILURE; + OSPI_setProtocol(oHandle, OSPI_NOR_PROTOCOL(8,8,8,1)); + OSPI_enableDDR(oHandle); + OSPI_setDualOpCodeMode(oHandle); + + /* Do a soft reset of the OSPI flash */ + OSPI_WriteCmdParams wrParams; + + OSPI_WriteCmdParams_init(&wrParams); + wrParams.cmd = 0x66; + status = OSPI_writeCmd(oHandle, &wrParams); + if(status == SystemP_SUCCESS) + { + wrParams.cmd = 0x99; + status = OSPI_writeCmd(oHandle, &wrParams); + } + /* Wait for the flash to reset */ + ClockP_usleep(100); + + OSPI_enableSDR(oHandle); + OSPI_clearDualOpCodeMode(oHandle); + OSPI_setProtocol(oHandle, OSPI_NOR_PROTOCOL(1,1,1,0)); +} + +void hal_init(void) +{ +#ifdef __WOLFBOOT + +#if 0 + asm( + "_debug_loop_start:\n" + " b _debug_loop_start\n" + ); +#endif + + Sciclient_waitForBootNotification(); + + if (!Bootloader_socIsMCUResetIsoEnabled()) + { + /* Update devGrp to ALL to initialize MCU domain when reset isolation is + not enabled */ + Sciclient_BoardCfgPrms_t boardCfgPrms_pm = + { + .boardConfigLow = (uint32_t)0, + .boardConfigHigh = 0, + .boardConfigSize = 0, + .devGrp = DEVGRP_ALL, + }; + + (void)Sciclient_boardCfgPm(&boardCfgPrms_pm); + + Sciclient_BoardCfgPrms_t boardCfgPrms_rm = + { + .boardConfigLow = (uint32_t)0, + .boardConfigHigh = 0, + .boardConfigSize = 0, + .devGrp = DEVGRP_ALL, + }; + + (void)Sciclient_boardCfgRm(&boardCfgPrms_rm); + + Bootloader_enableMCUPLL(); + } + + System_init(); + Bootloader_socOpenFirewalls(); + Drivers_open(); + + uart_write("ti_am64x_r5 init\n", 14); + Sciclient_getVersionCheck(1); +#else + +#if 0 + asm( + "_debug_loop_start:\n" + " b _debug_loop_start\n" + ); +#endif + + System_init(); + Drivers_open(); +#endif /* __WOLFBOOT */ + + flashFixUpOspiBoot(gOspiHandle[0]); + Board_driversOpen(); + OSPI_enableDacMode(gOspiHandle[0]); +} + +#ifdef __WOLFBOOT +/* Assert hook needed by SDK assert() macro. */ +void __assert_func(const char *a, int b, const char *c, const char *d) +{ + (void)a; + (void)b; + (void)c; + (void)d; + while (1) { + } +} + +void hal_prepare_boot(void) +{ + +} +#endif + +#define PAGE_SIZE 256 + +int RAMFUNCTION hal_flash_write(uint32_t address, const uint8_t *data, int len) +{ + int status = 0; + uint32_t page_addr; + uint32_t offset; + uint32_t chunk; + uint8_t page_buf[PAGE_SIZE]; + + while (len > 0) { + page_addr = address & ~(PAGE_SIZE - 1); + offset = address - page_addr; + chunk = PAGE_SIZE - offset; + if ((uint32_t)len < chunk) + chunk = (uint32_t)len; + + memcpy(page_buf, (void *)page_addr, PAGE_SIZE); + memcpy(page_buf + offset, data, chunk); + + OSPI_disableDacMode(gOspiHandle[0]); + status |= Flash_write(gFlashHandle[0], page_addr - ARCH_FLASH_OFFSET, page_buf, PAGE_SIZE); + OSPI_enableDacMode(gOspiHandle[0]); + + address += chunk; + data += chunk; + len -= (int)chunk; + } + + return status; +} + +void RAMFUNCTION hal_flash_unlock(void) +{ +} + +void RAMFUNCTION hal_flash_lock(void) +{ +} + +int RAMFUNCTION hal_flash_erase(uint32_t address, int len) +{ + int status = 0; + + if (len == 0) + return 0; + + address -= ARCH_FLASH_OFFSET; + + OSPI_disableDacMode(gOspiHandle[0]); + while (len > 0) { + uint32_t blk, page; + uint32_t block = address & ~(WOLFBOOT_SECTOR_SIZE - 1); + uint32_t offset = address - block; + uint32_t chunk = WOLFBOOT_SECTOR_SIZE - offset; + if ((uint32_t)len < chunk) + chunk = (uint32_t)len; + status = Flash_offsetToBlkPage(gFlashHandle[0], address, &blk, &page); + if (status != 0) + break; + status = Flash_eraseBlk(gFlashHandle[0], blk); + if (status != 0) + break; + address += chunk; + len -= (int)chunk; + } + OSPI_enableDacMode(gOspiHandle[0]); + + return status; +} + +#ifdef WOLFCRYPT_SECURE_MODE +static RNG_Handle rngHandle = NULL; + +void hal_trng_init(void) +{ + RNG_Handle handle = NULL; + if (gRngConfig[0].attrs->isOpen == 0) { + SA2UL_engineEnable(CSL_CP_ACE_CMD_STATUS_TRNG_EN_MASK); + handle = RNG_open(0); + if (handle != NULL) { + if (RNG_setup(handle) == RNG_RETURN_SUCCESS) { + rngHandle = handle; + } + else { + RNG_close(handle); + } + } + } + else { + /* already opened -- use existing handle */ + rngHandle = (RNG_Handle)&gRngConfig[0]; + } +} + +void hal_trng_fini(void) +{ +} + +#define RNG_NUM_DWORDS (4u) +int hal_trng_get_entropy(unsigned char *out, unsigned int len) +{ + if (out == NULL && len != 0) + return -1; + + while (len) { + uint32_t random[RNG_NUM_DWORDS]; + uint8_t *ptr = (uint8_t *)random; + int copy_len; + if (RNG_read(rngHandle, random) != RNG_RETURN_SUCCESS) + return -1; + copy_len = RNG_NUM_DWORDS * 4; + if (len < copy_len) + copy_len = len; + XMEMCPY(out, ptr, copy_len); + out += copy_len; + len -= copy_len; + } + + return 0; +} +#endif /* WOLFCRYPT_SECURE_MODE */ + + +#ifdef DEBUG_UART +void uart_init(void) +{ + +} + +void DebugP_uartLogWriterPutLine(uint8_t *buf, uint16_t num_bytes); + +void uart_write(const char *buf, unsigned int sz) +{ + const char *line; + unsigned int line_sz; + + while (sz > 0) + { + line = memchr(buf, '\n', sz); + if (line == NULL) { + DebugP_uartLogWriterPutLine((uint8_t *)buf, (uint16_t)sz); + break; + } + line_sz = (unsigned int)(line - buf); + if (line_sz > sz - 1U) { + line_sz = sz - 1U; + } + if (line_sz > 0) + DebugP_uartLogWriterPutLine((uint8_t *)buf, (uint16_t)line_sz); + DebugP_uartLogWriterPutLine((uint8_t *)"\r\n", (uint16_t)2U); + buf = line + 1; + sz -= line_sz + 1U; + } +} +#endif + + +#include +#include + +#ifdef __WOLFBOOT +void do_boot(const uint32_t *app_offset) +{ + HwiP_disable(); + CacheP_wbInvAll(CacheP_TYPE_ALL); + Bootloader_socCpuResetReleaseSelf(); + while (1) { + asm("nop"); + } +} +#endif /* __WOLFBOOT */ diff --git a/hal/ti_am64x_r5.ld b/hal/ti_am64x_r5.ld new file mode 100644 index 0000000000..1db7c8292a --- /dev/null +++ b/hal/ti_am64x_r5.ld @@ -0,0 +1,78 @@ +--stack_size=16384 +--heap_size=1024 +__IRQ_STACK_SIZE = 4096; +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 256; +__ABORT_STACK_SIZE = 256; +__UNDEFINED_STACK_SIZE = 256; + +-e_vectors_sbl + +MEMORY +{ + MSRAM_VECS : ORIGIN = 0x70000000 , LENGTH = 0x100 + MSRAM_0 : ORIGIN = 0x70000100 , LENGTH = 0x1FF00 + MSRAM_01 : ORIGIN = 0x70020000 , LENGTH = 0x60000 +} + +SECTIONS +{ + .vectors : + { + } > MSRAM_VECS , palign(8) + + .text : + { + *(.keystore*) + . = ALIGN(8); + *(.text*) + . = ALIGN(8); + *(.rodata*) + . = ALIGN(8); + *(.data*) + . = ALIGN(8); + } > MSRAM_0 , palign(8) + + .bss : + { + _start_bss = .; + *(.bss*) + . = ALIGN(4); + _end_bss = .; + _end = .; + } > MSRAM_01 , palign(8) + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .stack : + { + } > MSRAM_01 , palign(8) + + GROUP : { + .irqstack : { + . = . + __IRQ_STACK_SIZE; + } align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack : { + . = . + __FIQ_STACK_SIZE; + } align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack : { + . = . + __SVC_STACK_SIZE; + } align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack : { + . = . + __ABORT_STACK_SIZE; + } align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack : { + . = . + __UNDEFINED_STACK_SIZE; + } align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM_01 +} diff --git a/include/user_settings.h b/include/user_settings.h index 5ad3c664c1..7a20452254 100644 --- a/include/user_settings.h +++ b/include/user_settings.h @@ -744,6 +744,18 @@ extern int tolower(int c); #define WOLFSSL_SHA256 #define WOLFSSL_SHA384 #define WOLFSSL_SHA512 + #elif defined(TARGET_ti_am64x_r5) + #ifndef WOLFSSL_TI_AM64X_R5 + #define WC_NO_RNG + #endif + #define HAVE_AES_ECB + #define WOLFSSL_AES_128 + #define NO_AES_192 + #define WOLFSSL_AES_DIRECT + #define WOLFSSL_CMAC + #define WOLFSSL_SHA512 + #define WOLFSSL_STATIC_MEMORY_TEST_SZ (50 * 1024) + #define WOLFSSL_BENCHMARK_FIXED_UNITS_MB #else /* Use custom RNG for tests/benchmarks (saves ~7KB vs HASHDRBG). * WARNING: my_rng_seed_gen is NOT cryptographically secure. diff --git a/options.mk b/options.mk index 469bc5214b..7916312558 100644 --- a/options.mk +++ b/options.mk @@ -1037,9 +1037,11 @@ ifeq ($(DEBUG_SYMBOLS),1) ifeq ($(USE_GCC),1) CFLAGS+=-ggdb3 else ifneq ($(ARCH),AURIX) - ifneq ($(USE_CLANG),1) - # -gstabs was removed in GCC 12; -gdwarf-4 works on old and new GCC - CFLAGS+=-gdwarf-4 + ifneq ($(TARGET),ti_am64x_r5) + ifneq ($(USE_CLANG),1) + # -gstabs was removed in GCC 12; -gdwarf-4 works on old and new GCC + CFLAGS+=-gdwarf-4 + endif endif endif endif diff --git a/src/elf.c b/src/elf.c index 383495d7a1..8e7f196634 100644 --- a/src/elf.c +++ b/src/elf.c @@ -254,7 +254,9 @@ int elf_open(const unsigned char *ehdr, int *is_elf32) if (memcmp(ident, ELF_IDENT_STR, 4) != 0) { return -1; /* not valid header identifier */ } +#ifdef DEBUG_ELF wolfBoot_printf("ELF image found\n"); +#endif /* DEBUG_ELF */ *is_elf32 = !!(ident[ELF_CLASS_OFF] == ELF_CLASS_32); #ifdef WOLFBOOT_ELF_FLASH_SCATTER diff --git a/src/image.c b/src/image.c index aaec19c612..e3aeed862b 100644 --- a/src/image.c +++ b/src/image.c @@ -2258,9 +2258,11 @@ int wolfBoot_check_flash_image_elf(uint8_t part, unsigned long* entry_out) entry_off = eh->ph_offset; ph_size = sizeof(elf32_program_header); *entry_out = eh->entry; +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] 32-bit, entry=0x%08X, " "ph_offset=0x%08X, ph_count=%u\n", (unsigned int)eh->entry, (unsigned int)entry_off, entry_count); +#endif /* DEBUG_ELF */ } else { /* 64-bit ELF */ elf64_header* eh = (elf64_header*)elf_h; @@ -2268,13 +2270,17 @@ int wolfBoot_check_flash_image_elf(uint8_t part, unsigned long* entry_out) entry_off = eh->ph_offset; ph_size = sizeof(elf64_program_header); *entry_out = eh->entry; +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] 64-bit, entry=0x%08lx, " "ph_offset=0x%08lx, ph_count=%d\n", (unsigned long)eh->entry, (unsigned long)entry_off, entry_count); +#endif /* DEBUG_ELF */ } elf_hdr_sz = (size_t)elf_hdr_pht_combined_size(elf_h); +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] Header size: %zu bytes\n", elf_hdr_sz); +#endif /* DEBUG_ELF */ /* Hash the elf header and program header in the image, assuming the PHT * immediately follows the ELF header */ @@ -2299,9 +2305,11 @@ int wolfBoot_check_flash_image_elf(uint8_t part, unsigned long* entry_out) if (first_offset > elf_hdr_sz) { len = first_offset - elf_hdr_sz; +#ifdef DEBUG_ELF wolfBoot_printf( "ELF: [CHECK] Adding %d bytes padding before first segment\n", (int32_t)len); +#endif /* DEBUG_ELF */ /* Hash actual file content */ if (update_hash_flash_fwimg(&ctx, &boot, elf_hdr_sz, len) != 0) { return -1; @@ -2372,11 +2380,13 @@ int wolfBoot_check_flash_image_elf(uint8_t part, unsigned long* entry_out) load_addr = (uintptr_t)seg_start; /* Feed the loadable parts to the hash function */ +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] Hashing loadable segment: " "paddr = 0x%08lx, loadaddr = 0x%08lx, " "offset = 0x%08lx, size = %lu\n", (unsigned long)paddr, (unsigned long)load_addr, (unsigned long)offset, (unsigned long)filesz); +#endif /* DEBUG_ELF */ if (update_hash_flash_addr(&ctx, load_addr, (uint32_t)filesz, PART_IS_EXT(&boot)) != 0) { return -1; @@ -2402,10 +2412,12 @@ int wolfBoot_check_flash_image_elf(uint8_t part, unsigned long* entry_out) if (next_offset > (offset + filesz)) { uint32_t padding = next_offset - (offset + filesz); +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] Adding padding: %u bytes (from " "0x%08lx to 0x%08lx)\n", padding, (unsigned long)(offset + filesz), (unsigned long)next_offset); +#endif /* DEBUG_ELF */ /* Hash actual file content */ if (update_hash_flash_fwimg(&ctx, &boot, offset + filesz, padding) != 0) { @@ -2431,17 +2443,21 @@ int wolfBoot_check_flash_image_elf(uint8_t part, unsigned long* entry_out) /* Check if final offset is valid */ if (final_offset > (int64_t)boot.fw_size) { +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] Final offset (%d) exceeds image size (%d)\n", (int32_t)final_offset, (int32_t)boot.fw_size); +#endif /* DEBUG_ELF */ return -1; } /* Hash any trailing data after the last segment/header */ len = boot.fw_size - final_offset; if (len > 0) { +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] Hashing %u bytes of trailing data from " "offset 0x%llX\n", len, (unsigned long long)final_offset); +#endif /* DEBUG_ELF */ if (update_hash_flash_fwimg(&ctx, &boot, final_offset, len) != 0) { return -1; } @@ -2455,7 +2471,9 @@ int wolfBoot_check_flash_image_elf(uint8_t part, unsigned long* entry_out) wolfBoot_printf("ELF: [CHECK] SHA verification FAILED\n"); return -2; } +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [CHECK] Verification successful\n"); +#endif /* DEBUG_ELF */ return 0; } @@ -2495,10 +2513,12 @@ int wolfBoot_load_flash_image_elf(int part, unsigned long* entry_out, int ext_fl entry_off = ((const elf32_header*)eh)->ph_offset; *entry_out = (unsigned long)((const elf32_header*)eh)->entry; +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [STORE] 32-bit, entry=0x%08lx, " "ph_offset=0x%08lx, ph_count=%d\n", (unsigned long)((const elf32_header*)eh)->entry, (unsigned long)entry_off, entry_count); +#endif /* DEBUG_ELF */ } else { eh = (const elf64_header*)elfHdrBuf; @@ -2506,10 +2526,12 @@ int wolfBoot_load_flash_image_elf(int part, unsigned long* entry_out, int ext_fl entry_off = ((const elf64_header*)eh)->ph_offset; *entry_out = (unsigned long)((const elf64_header*)eh)->entry; +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [STORE] 64-bit, entry=0x%08lx, " "ph_offset=0x%08lx, ph_count=%d\n", (unsigned long)((const elf64_header*)eh)->entry, (unsigned long)entry_off, entry_count); +#endif /* DEBUG_ELF */ } /* Walk the program header table and store each loadable segment */ @@ -2585,10 +2607,12 @@ int wolfBoot_load_flash_image_elf(int part, unsigned long* entry_out, int ext_fl } load_addr = (uintptr_t)seg_start; +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [STORE] Writing loadable segment: " "loadaddr=0x%08lx, offset=0x%08lx, size=%lu\n", (unsigned long)load_addr, (unsigned long)offset, (unsigned long)filesz); +#endif /* DEBUG_ELF */ if (copy_flash_buffered((uintptr_t)(image + offset), load_addr, filesz, ext_flash, ext_flash) != 0) { wolfBoot_printf("ELF: [STORE] ERROR: could not write " @@ -2599,7 +2623,9 @@ int wolfBoot_load_flash_image_elf(int part, unsigned long* entry_out, int ext_fl entry_off += ph_size; } +#ifdef DEBUG_ELF wolfBoot_printf("ELF: [STORE] Image loading complete\n"); +#endif /* DEBUG_ELF */ return 0; } diff --git a/src/update_flash.c b/src/update_flash.c index 4f35b97cb6..0249c882ce 100644 --- a/src/update_flash.c +++ b/src/update_flash.c @@ -1367,7 +1367,9 @@ static int RAMFUNCTION wolfBoot_update(int fallback_allowed) #else /* DISABLE_BACKUP */ #ifdef WOLFBOOT_ELF_FLASH_SCATTER unsigned long entry; +#ifdef DEBUG_ELF wolfBoot_printf("ELF Scattered image digest check\n"); +#endif /* DEBUG_ELF */ if (wolfBoot_check_flash_image_elf(PART_BOOT, &entry) < 0) { wolfBoot_printf("ELF Scattered image digest check: failed. Restoring " "scattered image...\n"); @@ -1774,7 +1776,9 @@ void RAMFUNCTION wolfBoot_start(void) #ifdef WOLFBOOT_ELF_FLASH_SCATTER unsigned long entry; +#ifdef DEBUG_ELF wolfBoot_printf("ELF Scattered image digest check\n"); +#endif /* DEBUG_ELF */ if (wolfBoot_check_flash_image_elf(PART_BOOT, &entry) < 0) { wolfBoot_printf("ELF Scattered image digest check: failed. Restoring " "scattered image...\n"); diff --git a/test-app/ARM-ti_am64x_r5.ld b/test-app/ARM-ti_am64x_r5.ld new file mode 100644 index 0000000000..f98e90a982 --- /dev/null +++ b/test-app/ARM-ti_am64x_r5.ld @@ -0,0 +1,72 @@ +--stack_size=32768 +--heap_size=1024 +__IRQ_STACK_SIZE = 4096; +__FIQ_STACK_SIZE = 256; +__SVC_STACK_SIZE = 256; +__ABORT_STACK_SIZE = 256; +__UNDEFINED_STACK_SIZE = 256; + +-e_vectors + +MEMORY +{ + R5F_VECS : ORIGIN = 0x0 , LENGTH = 0x40 + MSRAM_45 : ORIGIN = 0x70100000 , LENGTH = 0xC0000 +} + +SECTIONS +{ + .vectors : { + } > R5F_VECS , palign(8) + + .text : + { + *(.text*) + *(.rodata*) + *(.data*) + } > MSRAM_45 , palign(8) + + .bss : + { + *(.bss*) + } > MSRAM_45 , palign(8) + RUN_START(__BSS_START) + RUN_END(__BSS_END) + + .stack : + { + } > MSRAM_45 , palign(8) + + GROUP : { + .irqstack : { + . = . + __IRQ_STACK_SIZE; + } align(8) + RUN_START(__IRQ_STACK_START) + RUN_END(__IRQ_STACK_END) + .fiqstack : { + . = . + __FIQ_STACK_SIZE; + } align(8) + RUN_START(__FIQ_STACK_START) + RUN_END(__FIQ_STACK_END) + .svcstack : { + . = . + __SVC_STACK_SIZE; + } align(8) + RUN_START(__SVC_STACK_START) + RUN_END(__SVC_STACK_END) + .abortstack : { + . = . + __ABORT_STACK_SIZE; + } align(8) + RUN_START(__ABORT_STACK_START) + RUN_END(__ABORT_STACK_END) + .undefinedstack : { + . = . + __UNDEFINED_STACK_SIZE; + } align(8) + RUN_START(__UNDEFINED_STACK_START) + RUN_END(__UNDEFINED_STACK_END) + } > MSRAM_45 +} + +_wolfboot_partition_boot_address = @WOLFBOOT_PARTITION_BOOT_ADDRESS@; +_wolfboot_partition_size = @WOLFBOOT_PARTITION_SIZE@; +_wolfboot_partition_update_address = @WOLFBOOT_PARTITION_UPDATE_ADDRESS@; +_wolfboot_partition_swap_address = @WOLFBOOT_PARTITION_SWAP_ADDRESS@; diff --git a/test-app/Makefile b/test-app/Makefile index 79f29e9f19..1f9524cfda 100644 --- a/test-app/Makefile +++ b/test-app/Makefile @@ -94,8 +94,10 @@ else CFLAGS+=-Wall -ffreestanding -Wno-unused -ffunction-sections -fdata-sections # Stack usage computation not supported on TriCore ifneq ($(ARCH),AURIX) - ifneq ($(USE_CLANG),1) - CFLAGS+=-Wstack-usage=$(STACK_USAGE_LIMIT) + ifneq ($(TARGET),ti_am64x_r5) + ifneq ($(USE_CLANG),1) + CFLAGS+=-Wstack-usage=$(STACK_USAGE_LIMIT) + endif endif endif CFLAGS+=-DTARGET_$(TARGET) -I../include @@ -103,9 +105,11 @@ else ifeq ($(USE_GCC),1) CFLAGS+=-ggdb3 else ifneq ($(ARCH),AURIX) - ifneq ($(USE_CLANG),1) - # -gstabs was removed in GCC 12; -gdwarf-4 works on old and new GCC - CFLAGS+=-gdwarf-4 + ifneq ($(TARGET),ti_am64x_r5) + ifneq ($(USE_CLANG),1) + # -gstabs was removed in GCC 12; -gdwarf-4 works on old and new GCC + CFLAGS+=-gdwarf-4 + endif endif endif @@ -170,8 +174,10 @@ endif # Setup default linker flags (gcc-driver form). Renesas RX links with ld # directly (USE_GCC=0) and gets its -T/-gc-sections/oformat from arch.mk, so # these gcc-driver flags (-Wl,/-nostartfiles and a duplicate -T) are skipped. -ifneq ($(ARCH),RENESAS_RX) -LDFLAGS+=-T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=image.map -nostartfiles +ifeq ($(TARGET),ti_am64x_r5) + LDFLAGS+=-Wl,$(LSCRIPT) -Wl,-m=image.map -Wl,--symbol_map=putchar_=putchar__ -Wl,--honor_cmdfile_order +else ifneq ($(ARCH),RENESAS_RX) + LDFLAGS+=-T $(LSCRIPT) -Wl,-gc-sections -Wl,-Map=image.map -nostartfiles endif # Setup default objcopy flags @@ -236,7 +242,9 @@ endif ifeq ($(WOLFCRYPT_SUPPORT),1) # Add support infrastructure APP_OBJS+=wolfcrypt_support.o + ifneq ($(TARGET),ti_am64x_r5) APP_OBJS+=syscalls.o + endif # Add wolfCrypt core implementation files APP_OBJS+=$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/hash.o @@ -261,6 +269,9 @@ ifeq ($(WOLFCRYPT_SUPPORT),1) # Add AES support (needed by benchmark for AES-CBC etc.) APP_OBJS+=$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/aes.o + # Add CMAC support + APP_OBJS+=$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/cmac.o + # Add ECC support (needed by test suite) APP_OBJS+=$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/ecc.o APP_OBJS+=$(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/sp_int.o @@ -799,6 +810,10 @@ ifeq ($(TARGET),ti_hercules) OBJCOPY_FLAGS= endif +ifeq ($(TARGET),ti_am64x_r5) + LSCRIPT_TEMPLATE=ARM-ti_am64x_r5.ld +endif + ifeq ($(TARGET),va416x0) APP_OBJS+=$(SDK_OBJS) LSCRIPT_TEMPLATE=ARM-va416x0.ld @@ -1036,6 +1051,98 @@ ifeq ($(TARGET),mcxn) endif endif +ifeq ($(TARGET),ti_am64x_r5) + GENERATED_APP_SRCS= + GENERATED_APP_SRCS+=../generated/test-app/ti_board_config.c + GENERATED_APP_SRCS+=../generated/test-app/ti_board_open_close.c + GENERATED_APP_SRCS+=../generated/test-app/ti_dpl_config.c + GENERATED_APP_SRCS+=../generated/test-app/ti_drivers_config.c + GENERATED_APP_SRCS+=../generated/test-app/ti_drivers_open_close.c + GENERATED_APP_SRCS+=../generated/test-app/ti_pinmux_config.c + GENERATED_APP_SRCS+=../generated/test-app/ti_power_clock_config.c + + ORIGINAL_SA2UL_C=$(TI_MCU_PLUS_SDK)/source/security/security_common/drivers/crypto/sa2ul/sa2ul.c + PATCHED_SA2UL_C=$(abspath ../generated/common/sa2ul.c) + PATCHFILE_SA2UL_C=$(abspath ../config/examples/ti-am64x-r5/mcuplussdk_11.02.00_sa2ul.c.patch) + + APP_OBJS+=$(patsubst %.c,%.o,$(GENERATED_APP_SRCS)) + APP_OBJS+=$(patsubst %.c,%.o,$(PATCHED_SA2UL_C)) + APP_OBJS+=\ + $(TI_MCU_PLUS_SDK)/source/board/flash/flash.o \ + $(TI_MCU_PLUS_SDK)/source/board/flash/ospi/flash_nor_ospi.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/firewall/v0/firewall.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/ospi_phy_dqs.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/ospi_v0.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/dma/udma/ospi_udma_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/ospi_phy_dqs_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/ospi_v0_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/ospi/v0/lld/ospi_tuning/ospi_tuning_algo/algo_v1/ospi_phy_tuning.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/pinmux/am64x_am243x/pinmux.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/qos/v0/qos.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/csl_sec_proxy.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_pm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_rm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/sciclient_rm_irq.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sciclient_fmwSecureProxyMap.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sciclient_irq_rm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/sciclient/soc/am64x_am243x/sciclient_soc_priv.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/soc/am64x_am243x/soc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/uart_v0.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/lld/uart_v0_lld.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/lld/dma/soc/am64x_am243x/uart_dma_soc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/uart/v0/lld/dma/udma/uart_dma_udma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_bcdma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_intaggr.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_lcdma_ringacc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/hw_include/csl_pktdma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/soc/udma_rmcfg_common.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/soc/am64x_am243x/udma_rmcfg.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/soc/am64x_am243x/udma_soc.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_ch.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_event.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_flow.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_ring_common.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_ring_lcdma.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_rm.o \ + $(TI_MCU_PLUS_SDK)/source/drivers/udma/v0/udma_utils.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/AddrTranslateP.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/ClockP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/DebugP_log.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/DebugP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/DebugP_uartLogWriter.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/printf.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/SemaphoreP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/TaskP_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/common/TimerP.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/boot_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/boot_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/CacheP_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/CacheP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/ClockP_nortos_r5.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_handlers_nortos.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_handlers_nortos_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_vectors_nortos_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/HwiP_armv7r_vim.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/MpuP_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/MpuP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/Mutex_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/PmuP_armv7r.o \ + $(TI_MCU_PLUS_SDK)/source/kernel/nortos/dpl/r5/PmuP_armv7r_asm.o \ + $(TI_MCU_PLUS_SDK)/source/security/security_common/drivers/crypto/crypto.o \ + $(TI_MCU_PLUS_SDK)/source/security/security_common/drivers/crypto/rng/rng.o + + ifeq ($(PKA),1) + CFLAGS+=-DWOLFSSL_TI_AM64X_R5 + CFLAGS+=-DWOLFSSL_TI_AM64X_RNG_CTR_DRBG + APP_OBJS+=\ + $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/cryptocb.o \ + $(WOLFBOOT_LIB_WOLFSSL)/wolfcrypt/src/port/ti/ti-sa2ul_r5_port.o + endif +endif + ifeq ($(TARGET),lpc55s69) CFLAGS+=-ffunction-sections -fdata-sections CFLAGS+=-DWOLFSSL_NXP_RNG_1 @@ -1487,6 +1594,22 @@ ifeq ($(WOLFHSM_SERVER),1) APP_OBJS += $(sort $(patsubst $(WOLFBOOT_LIB_WOLFSSL)/%, $(WOLFBOOT_LIB_WOLFSSL)/%, $(WOLFCRYPT_OBJS))) endif +ifeq ($(TARGET),ti_am64x_r5) +$(GENERATED_APP_SRCS): + @echo "\t[TI SYSCONFIG] ../generated/test-app/" + $(Q)$(TI_SYSCONFIG)/nodejs/node \ + $(TI_SYSCONFIG)/dist/cli.js -q \ + --product $(TI_MCU_PLUS_SDK)/.metadata/product.json \ + --context r5fss0-0 --part Default --package ALV \ + --output ../generated/test-app/ \ + ../config/examples/ti-am64x-r5/ti-am64x-r5_test-app.syscfg + +$(PATCHED_SA2UL_C): $(ORIGINAL_SA2UL_C) $(PATCHFILE_SA2UL_C) + @echo "\t[PATCH] $(PATCHED_SA2UL_C)" + $(Q)mkdir -p $(dir $@) + $(Q)patch -s -o $@ $< $(PATCHFILE_SA2UL_C) +endif + standalone:CFLAGS+=-D"TEST_APP_STANDALONE" standalone:LDFLAGS:=-T standalone.ld -Wl,-gc-sections -Wl,-Map=image.map @@ -1512,8 +1635,8 @@ APP_OBJS := $(patsubst $(WOLFBOOT_LIB_WOLFSSL)/%, \ APP_OBJS := $(patsubst $(WOLFBOOT_LIB_WOLFIP)/%, \ $(WOLFIP_LOCAL_OBJDIR)/%, $(APP_OBJS)) -ifeq ($(ELF_FLASH_SCATTER),1) -# When ELF_FLASH_SCATTER=1, preprocess the ELF file with the squashelf tool +# squashelf if either ELF_FLASH_SCATTER==1 or TARGET==ti_am64x_r5 +ifneq (,$(filter 1,$(ELF_FLASH_SCATTER))$(filter ti_am64x_r5,$(TARGET))) SQUASHELF_TOOL = ../tools/squashelf/squashelf image-orig.elf: $(APP_OBJS) $(LSCRIPT) @echo "\t[LD] $@" @@ -1523,7 +1646,7 @@ image.elf: image-orig.elf @echo "\t[SQUASHELF] $@" $(Q)$(SQUASHELF_TOOL) -v --nosht $< $@ else -# Default behavior when ELF_FLASH_SCATTER is not set +# Default behavior image.elf: $(APP_OBJS) $(LSCRIPT) @echo "\t[LD] $@" $(Q)$(LD) $(LDFLAGS) $(APP_OBJS) $(LIBS) $(OUTPUT_FLAG) $@ @@ -1604,9 +1727,9 @@ wolfip_tftp_test.o: wolfip_tftp_test.c clean: - $(Q)rm -f *.bin *.elf tags *.o $(LSCRIPT) $(APP_OBJS) wcs/*.o + $(Q)rm -f *.bin *.elf *.map tags *.o $(LSCRIPT) $(APP_OBJS) wcs/*.o $(Q)rm -rf $(WOLFSSL_LOCAL_OBJDIR) $(WOLFTPM_LOCAL_OBJDIR) \ - $(WOLFHSM_LOCAL_OBJDIR) $(WOLFIP_LOCAL_OBJDIR) + $(WOLFHSM_LOCAL_OBJDIR) $(WOLFIP_LOCAL_OBJDIR) ../generated/test-app $(LSCRIPT): $(LSCRIPT_TEMPLATE) FORCE $(Q)printf "%d" $(WOLFBOOT_PARTITION_BOOT_ADDRESS) > .wolfboot-offset @@ -1621,6 +1744,10 @@ ifdef WOLFBOOT_ELF_EXEC_ADDRESS $(Q)printf "0x%X" `cat .entry-point` > .entry-point $(Q)printf "%d" $(WOLFBOOT_ELF_EXEC_SIZE) > .app-size $(Q)printf "0x%X" `cat .app-size` > .app-size +else + # eliminate make errors... + $(Q)printf "0x0" > .entry-point + $(Q)printf "0x0" > .app-size endif else # Standard mode: boot partition address + header offset diff --git a/test-app/app_ti_am64x_r5.c b/test-app/app_ti_am64x_r5.c new file mode 100644 index 0000000000..8e97feafee --- /dev/null +++ b/test-app/app_ti_am64x_r5.c @@ -0,0 +1,144 @@ +/* app_ti_am64x_r5.c + * + * Copyright (C) 2026 wolfSSL Inc. + * + * This file is part of wolfBoot. + * + * wolfBoot is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 3 of the License, or + * (at your option) any later version. + * + * wolfBoot is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335, USA + */ + +#include + +#include "target.h" +#include "wolfboot/wolfboot.h" +#include "printf.h" + +/* wolfCrypt test/benchmark support */ +#ifdef WOLFCRYPT_TEST +#include +#include +int wolfcrypt_test(void *args); +#endif + +#ifdef WOLFCRYPT_BENCHMARK +#include +#include +int benchmark_test(void *args); +#endif + +extern void hal_init(void); + +static void check_parts( + uint32_t *pboot_ver, uint32_t *pupdate_ver, + uint8_t *pboot_state, uint8_t *pupdate_state +) +{ +#ifdef WOLFCRYPT_SECURE_MODE + *pboot_ver = wolfBoot_nsc_current_firmware_version(); + *pupdate_ver = wolfBoot_nsc_update_firmware_version(); + if (wolfBoot_nsc_get_partition_state(PART_BOOT, pboot_state) != 0) + *pboot_state = IMG_STATE_NEW; + if (wolfBoot_nsc_get_partition_state(PART_UPDATE, pupdate_state) != 0) + *pupdate_state = IMG_STATE_NEW; +#else + *pboot_ver = wolfBoot_current_firmware_version(); + *pupdate_ver = wolfBoot_update_firmware_version(); + if (wolfBoot_get_partition_state(PART_BOOT, pboot_state) != 0) + *pboot_state = IMG_STATE_NEW; + if (wolfBoot_get_partition_state(PART_UPDATE, pupdate_state) != 0) + *pupdate_state = IMG_STATE_NEW; +#endif + + wolfBoot_printf(" boot: ver=0x%lx state=0x%02x\n", *pboot_ver, *pboot_state); + wolfBoot_printf(" update: ver=0x%lx state=0x%02x\n", *pupdate_ver, *pupdate_state); +} + +void main(void) +{ + uint32_t boot_ver, update_ver; + uint8_t boot_state, update_state; + + hal_init(); + + wolfBoot_printf("\n==================================\n"); + wolfBoot_printf("TI AM64x wolfBoot demo Application\n"); + wolfBoot_printf("Copyright 2026 wolfSSL Inc\n"); + wolfBoot_printf("==================================\n"); + + check_parts(&boot_ver, &update_ver, &boot_state, &update_state); + + if ( + boot_ver != 0 && + (boot_state == IMG_STATE_TESTING || boot_state == IMG_STATE_NEW) + ) + { +#ifdef WOLFCRYPT_SECURE_MODE + wolfBoot_printf("Calling wolfBoot_nsc_success()\n"); + wolfBoot_nsc_success(); +#else + wolfBoot_printf("Calling wolfBoot_success()\n"); + wolfBoot_success(); +#endif + check_parts(&boot_ver, &update_ver, &boot_state, &update_state); + } + + if (boot_ver == 1) + { + if (update_ver != 0) { + wolfBoot_printf("Update detected, version: 0x%lx\n", update_ver); + wolfBoot_printf("Triggering update...\n"); +#ifdef WOLFCRYPT_SECURE_MODE + wolfBoot_nsc_update_trigger(); +#else + wolfBoot_update_trigger(); +#endif + check_parts(&boot_ver, &update_ver, &boot_state, &update_state); + wolfBoot_printf("...done. Reboot to apply.\n"); + } + } + +#if defined(WOLFCRYPT_TEST) || defined(WOLFCRYPT_BENCHMARK) + wolfCrypt_Init(); + +# ifdef WOLFCRYPT_TEST + wolfBoot_printf("\nRunning wolfCrypt tests...\n"); + wolfcrypt_test(NULL); + wolfBoot_printf("Tests complete.\n\n"); +# endif + +# ifdef WOLFCRYPT_BENCHMARK + wolfBoot_printf("\nRunning wolfCrypt benchmarks...\n"); +#if 1 + benchmark_test(NULL); +#else + { + word32 bs; + for (bs = BENCH_SIZE_EMBEDDED; bs >= 16; bs >>= 1) { + wolfBoot_printf("\n"); + benchmark_configure(bs); + benchmark_test(NULL); + } + } +#endif + wolfBoot_printf("Benchmarks complete.\n\n"); +# endif + + wolfCrypt_Cleanup(); +#endif + + while (1) { + __asm__ volatile ("wfi"); + } +} diff --git a/test-app/wolfcrypt_support.c b/test-app/wolfcrypt_support.c index a9a5c6d601..d6f6c515a1 100644 --- a/test-app/wolfcrypt_support.c +++ b/test-app/wolfcrypt_support.c @@ -185,6 +185,8 @@ return (uint64_t)csr_read(time); #endif } +#elif defined(TARGET_ti_am64x_r5) + extern uint64_t ClockP_getTimeUsec(void); #else /* Simple tick counter fallback */ static volatile unsigned int tick_counter = 0; @@ -234,6 +236,10 @@ unsigned long my_time(unsigned long* timer) unsigned long t = (unsigned long)(mpfs_get_ticks() / RISCV_SMODE_TIMER_FREQ); if (timer) *timer = t; return t; +#elif defined(TARGET_ti_am64x_r5) + unsigned long t = (unsigned long)(ClockP_getTimeUsec() / 1000000); + if (timer) *timer = t; + return t; #else /* Simple incrementing counter */ tick_counter++; @@ -281,6 +287,9 @@ double current_time(int reset) if (reset) mpfs_start_ticks = mpfs_get_ticks(); return (double)(mpfs_get_ticks() - mpfs_start_ticks) / (double)RISCV_SMODE_TIMER_FREQ; +#elif defined(TARGET_ti_am64x_r5) + (void)reset; + return (double)(ClockP_getTimeUsec()) / 1000000.0; #else /* Simple counter-based timing */ if (reset)