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chipStdPar

C++17 parallel-STL forwarding for chipStar.

chipStar ships no hipstdpar acceleration library, so HIP code offloading parallel STL algorithms (std::execution::par_unseq over device pointers) cannot compile with clang's --hipstdpar mode (see chipStar issue #1411). chipStdPar is a header-only library that forwards those algorithms to chipStar's working rocThrust HIP backend instead, bypassing the driver mode.

Usage

The header provides stdpar_shim:: overloads mirroring the std:: signatures (policy tag objects stdpar_shim::par, stdpar_shim::par_unseq). Change call sites by qualification only (overloading std:: for real std types is not legal C++):

#include <stdpar_shim.h>
double r = stdpar_shim::transform_reduce(stdpar_shim::par_unseq,
                                         d_a, d_a + n, d_b, 0.0);

Build flags (the proven chipStar rocThrust pattern):

CHIPSTAR_ROOT := $(patsubst %/bin/hipcc,%,$(shell command -v hipcc))
CFLAGS += -isystem $(CHIPSTAR_ROOT)/include
CFLAGS += -DTHRUST_DEVICE_SYSTEM=THRUST_DEVICE_SYSTEM_HIP
CFLAGS += -I<chipStdPar>/include

Coverage

Currently implemented: transform_reduce (two-range, default plus/multiplies) → thrust::inner_product(thrust::device, ...). Additional algorithms are added as consumers need them — contributions welcome.

Provenance

Extracted from the HeCBench chipStar sweep (CHIP-SPV/HeCBench branch individual-fixes, dp-hip), verified on Intel Arc B570: results match a poisoned-slot host reference exactly; the reduction runs GPU-resident at device memory bandwidth (67M doubles in ~1.4 ms ≈ 380 GB/s).

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Header-only C++17 parallel-STL forwarding to rocThrust for chipStar

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