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Included review availability: Your plan provides up to 2 included reviews per hour; 0 remain after this review. 📝 WalkthroughWalkthroughThe Triton backend now provides stochastic FP8 rounding for supported CUDA devices. It adds kernel and wrapper logic, public registration, capability constraints, README support, and tests for formats, edge values, layouts, buffer reuse, and empty inputs. ChangesTriton stochastic FP8 rounding
Suggested reviewers: Sequence Diagram(s)sequenceDiagram
participant Caller
participant stochastic_rounding_fp8
participant stochastic_rounding_fp8_kernel_tl
participant RNGBuffer
Caller->>stochastic_rounding_fp8: provide x, rng, output_type
stochastic_rounding_fp8->>RNGBuffer: validate and create FP8 output view
stochastic_rounding_fp8->>stochastic_rounding_fp8_kernel_tl: launch rounding kernel
stochastic_rounding_fp8_kernel_tl->>RNGBuffer: write rounded FP8 values
RNGBuffer-->>Caller: return FP8 output
Merge Risk: ⚪ Minimal · up to This change adds Triton-based stochastic FP8 rounding for supported NVIDIA GPUs, with no identified correctness, compatibility, or operational issue remaining. 🚥 Pre-merge checks | ✅ 2✅ Passed checks (2 passed)
✨ Finishing Touches🧪 Generate unit tests (beta)
✨ Simplify code
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Inline comments:
In `@tests/test_qdq.py`:
- Around line 169-170: Update the device eligibility check in the
stochastic_rounding_fp8 test setup to skip CUDA devices with compute capability
below SM 8.9 before selecting or invoking the Triton backend. Preserve the
existing get_capable_backends check for unsupported Triton configurations.
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📒 Files selected for processing (5)
README.mdcomfy_kitchen/backends/triton/__init__.pycomfy_kitchen/backends/triton/quantization.pytests/test_constraints.pytests/test_qdq.py
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Summary
Add a Triton implementation of
stochastic_rounding_fp8for NVIDIA GPUs with native FP8 support (compute capability 8.9+). This avoids the slow, memory-heavy eager fallback reported in Comfy-Org/ComfyUI#15311 when the native CUDA backend is unavailable.Changes
uint8RNG buffer as output, avoiding an additional output allocation.Correctness and compatibility
RTX 5090 performance
BF16 to E4M3FN, warmed kernels, median latency, rotating working set >= 256 MiB:
For 16,777,216 contiguous BF16 elements, both CUDA and Triton add 0 MiB of peak PyTorch-allocated memory because the output aliases the RNG buffer. Eager adds 240 MiB.
Validation