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3x3 Matrix multiplication coprocessor implemented in handwritten Verilog design to run on Altera Max10M08 eval board

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Matrix Multiply Verilog Source

This is my first attempt at writing any HDL so don't think this code is any sort of best practice.

Documentation: Google Drive

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3x3 Matrix multiplication coprocessor implemented in handwritten Verilog design to run on Altera Max10M08 eval board

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