BPU: sample BTB ready on lookup, not every cycle - #284
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RegNext(ready) follows SRAM readiness even when fetch is stalled. After a rejected BTB read, ready returns to 1 on an idle cycle and the held SRAM response is treated as valid for the new pcLatch. Same-tag collisions become false hits; in-order IFU has no maybeBranch recovery, so the wrong path can commit. Sample ready only when fetch presents a PC, then hold that accept or reject through ICache stalls. Keep the existing BoolStopWatch flush and per-bank ready on the OoO path.
poemonsense
approved these changes
Sep 20, 2026
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RegNext(ready) follows SRAM readiness even when fetch is stalled. After a rejected BTB read, ready returns to 1 on an idle cycle and the held SRAM response is treated as valid for the new pcLatch. Same-tag collisions become false hits; in-order IFU has no maybeBranch recovery, so the wrong path can commit.
Sample ready only when fetch presents a PC, then hold that accept or reject through ICache stalls. Keep the existing BoolStopWatch flush and per-bank ready on the OoO path.