fix(linker): correct RAM size to 96K for STM32G474 projects

[94xhn]

Relates to #55 (closed as not_planned because the reporter didn't reply with a board name - the underlying value is still wrong for every G474 project in the repo, not just the one #55 reported).

Problem

Every STM32G474xx GCC linker script (STM32CubeIDE/*.ld) in this repo defines the contiguous RAM region at 0x20000000 as 128K:

MEMORY
{
  CCMSRAM    (xrw)    : ORIGIN = 0x10000000,   LENGTH = 32K
  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 128K
  ROM    (rx)    : ORIGIN = 0x08000000,   LENGTH = 512K
}

STM32G474xx has 128KB of total SRAM, but it's split as 96KB contiguous SRAM1+SRAM2 at 0x20000000 plus a separate 32KB CCM SRAM at 0x10000000 (already correctly declared in the same file). The RAM region above should be 96K, not 128K - as currently written, an application whose .data/.bss grows past 96KB links successfully instead of failing, and then overruns into unmapped memory at runtime.

This is the same defect class ST already confirmed and fixed for other G4 parts:

• Issue G491 and G4A1 wrong RAM size in linker script #19 ("G491/G4A1 RAM size wrong") - fixed in v1.4.0
• Issue The GNU Link Script in STM32CubeG4/Projects/NUCLEO-G491RE/Templates/STM32CubeIDE/STM32G491RETX_FLASH.ld defines wrong RAM size #29 ("NUCLEO-G491RE linker script") - fixed in v1.5.2

...but G474 was apparently missed in both passes.

Verification

I cross-checked the correct value against the EWARM (IAR) *.icf linker files for the same parts, which mostly already get this right: 366 out of 372 already correctly define the RAM region as 0x20000000-0x20017FFF (96K). The remaining 6 (all under B-G474E-DPOW1) have the exact same 128K (0x2001FFFF) mistake and are fixed here too.

Scope of this PR

This touches 377 files (371 .ld + 6 .icf), because the same wrong constant (and matching wrong doc-comment "128Kbytes RAM" header line) is copied identically into every G474-based board/example/application project directory in the repo. I verified this is a pure, single-value, mechanical correction:

• Confirmed the affected .ld line is byte-for-byte identical across all 371 files before the fix (RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K).
• Applied the fix with sed (verified manually on one file first), then re-verified with grep that exactly 377 files now have the corrected value and 0 remain with the old value.
• git diff --stat: 377 files changed, 748 insertions(+), 748 deletions(-) - i.e. exactly 2 lines touched per .ld file (MEMORY region + doc comment) and 1 line per .icf file, nothing else.

Happy to split this into smaller per-board-family PRs if that's easier to review - let me know and I'll do it.

Disclosure

Generative AI (Claude) was used to help investigate this issue, verify the correct value via cross-checking, and script the fix. All changes were reviewed by me before submission.

[ALABSTM]

Hello @94xhn,

Thank you for this analysis and fix proposal, as well as the others. Actually, the RAM size specified in the linker files for the STM32G474xE devices is correct, although it may not seem so at first glance.

Indeed, paragraph 3.5 Embedded SRAM of DS12288, rev. 6, says about the CCM SRAM:

It is also aliased at 0x2001 8000 address to be accessed by all masters (CPU, DMA1, DMA2) through SBUS contiguously to SRAM1 and SRAM2.

Similarly, paragraph 2.4 Embedded SRAM of RM0440, rev. 9, says:

The CCM SRAM is aliased at address following the end of SRAM2 ( [...] 0x2001 8000 for category 3 devices [...] ), offering a continuous address space with the SRAM1 and SRAM2. CCM can be accessed by DMA only by this aliased address.

The STM32G474xE being category 3 devices as indicated in Table 1. STM32G4 series memory density of RM0440, this means that:

• The 32KB (or 0x8000KB) CCM SRAM can also be accessed through the address range 0x2001 8000 - 0x2001 FFFF,
• The total RAM size is 128KB and its end address is 0x2001 FFFF, not 0x2001 7FFF.

I hope this removes the confusion. Please do not hesitate should you have questions about this.

With regards,

[94xhn]

Thank you for the correction. I missed the CCM SRAM alias at 0x20018000 and incorrectly treated the 0x10000000 mapping as the only usable address. The separate EWARM regions were also not a valid cross-check against the contiguous GCC view. You are right that 0x20000000-0x2001FFFF is valid for STM32G474xE. Closing this PR.

[ALABSTM]

You're welcome.