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decode_instruction checked only the decoded kind against the selected profile. A profile without Rv64C, such as RV64IM_JOLT, still accepted compressed encodings and 4-byte instructions at 2-byte-aligned addresses. When the profile lacks Rv64C, decode_instruction now rejects compressed rows with the new ProgramError::IllegalCompressedInstruction and then rejects addresses that are not 4-byte aligned, both before the kind is decoded. Profiles that include Rv64C, including the default RV64IMAC_JOLT, are unchanged. jolt-riscv gains a named RV64I profile, which replaces four identical test-local constants in jolt-program and is used by the new decode and ELF tests.
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📏 PR diffNote Actual code changed: 27 lines🟢 +23 added 🔴 −4 removed Tests, docs, fixtures, and helper scripts excluded.
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Why
decode_instructionchecked only the decoded instruction kind against the selected profile. A profile withoutRv64C, such as the existingRV64IM_JOLT, therefore still accepted compressed encodings, and 4-byte instructions at addresses that are only 2-byte aligned. The profile did not constrain encoding width or alignment.What
jolt-program,image/decode.rs: when the profile does not containSourceExtension::Rv64C,decode_instructionrejects a compressed row withProgramError::IllegalCompressedInstruction { address }. It then rejects an address that is not 4-byte aligned withMalformedImage("instruction address is not 4-byte aligned"). Both checks run before the kind is decoded, so they take precedence over unknown-opcode and illegal-kind errors. Profiles that containRv64C, including the defaultRV64IMAC_JOLT, take the same path as before, with no new alignment check.jolt-program,error.rs: new variantProgramError::IllegalCompressedInstruction { address: u64 }.jolt-riscv,profile.rs: new exportedRV64Iprofile (Rv64Isource extension only, no inline extensions). It replaces four identical test-localRV64I_ONLYconstants acrossexpand/metadata.rs,expand/tests.rsandpreprocess/bytecode.rs.Compatibility:
ProgramErroris not#[non_exhaustive], so downstream code that matches it exhaustively must handle the new variant. No exhaustive match exists in this workspace.Rv64Cmay now fail: images containing compressed instructions, and images whose 4-byte instructions sit at 2-byte-aligned addresses (for example after zero halfword padding, which ELF decoding still skips).Tests
image/decode/tests.rs:rv64i_decodes_every_base_instructiondecodes one vector for each of the 52 RV64I kinds underRV64I.rv64i_rejects_non_base_instructions_and_unknown_encodingscovers M, A, Zicsr, privileged and inline encodings rejected asIllegalSourceInstruction, and an unknown opcode.compressed_rows_are_rejected_before_kind_and_alignment_checksruns under bothRV64IandRV64IM_JOLT. It covers a validc.addiand an invalid word at a 2-byte-aligned address, and checks thatRV64IMAC_JOLTstill decodes the compressed row.alignment_is_checked_before_kind_only_without_rv64cchecks that misaligned addresses are rejected under both non-compressed profiles before an unknown opcode is reported, and thatRV64IMAC_JOLTstill accepts 2-byte-aligned rows of either width.image/elf.rs: threedecode_elftests cover the same boundary end to end: compressed rejection underRV64I/RV64IM_JOLT, alignment rejection under both, and acceptance underRV64IMAC_JOLT, plus a base instruction decoded underRV64I.jolt-riscvprofile.rs:RV64Isource legality overSourceInstructionKind::ALLequals the 52 RV64I base kinds plus the existing extensionless pseudo kinds, and its fingerprint differs from every other exported profile.rdrejection guards are unchanged.Verification
On this branch (macOS):
cargo fmt --all --check,python3 scripts/check_style_invariants.py --base origin/main, andcargo clippy -p jolt-riscv -p jolt-program -p tracer -p jolt-host --all-targets -- -D warnings(also with--features field-inline, and-p jolt-program --all-features) all succeed.cargo nextest run -p jolt-riscv -p jolt-program --all-features(167 passed), the same with default features (112 passed), andcargo nextest run -p tracer(174 passed) all succeed. No performance numbers are claimed. The added branch runs once per decoded instruction.