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…d bytecode Row conversion now compares the executed instruction with the full preprocessed row, including opcode, normalized operands, address, compression flag, and virtual-sequence metadata. A mismatch returns BytecodeInstructionMismatch with the bytecode PC and expected and actual instructions; missing addresses or expansion positions still return MissingBytecodePc. Both eager tracing and chunk replay perform this validation, and the documentation explains that mutable instruction fetch remains unchanged and chunked execution detects mismatches during replay. Fixes a16z#1952. Refs a16z#1952
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Summary
A guest can execute modified instructions successfully but fail later during proof generation because those instructions differ from the preprocessed bytecode. Changes to an opcode or operands can reach this late failure even when the instruction still maps to an existing bytecode row. The emulator fetches instructions from mutable memory, while the proof uses bytecode fixed during preprocessing. Row conversion previously looked up the bytecode PC by address and virtual-sequence position without checking that the executed instruction matched the instruction at that PC.
Row conversion now compares the executed instruction with the full preprocessed row, including opcode, normalized operands, address, compression flag, and virtual-sequence metadata. A mismatch returns BytecodeInstructionMismatch with the bytecode PC and expected and actual instructions; missing addresses or expansion positions still return MissingBytecodePc. Both eager tracing and chunk replay perform this validation, and the documentation explains that mutable instruction fetch remains unchanged and chunked execution detects mismatches during replay. Refs #1952.
Refs #1952
Changes
Covered in the summary above.
Testing
cargo clippyandcargo fmtpassRan
cargo testlocally for the jolt TraceError change; it passed.Security Considerations
Not applicable to this change.
Breaking Changes
None
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