Issues

• firrtl internal error- caused by java

  chipsalliance/firrtl#2691 · Filter by author Prasanthyg opened on Jun 12, 2024
  3

• Internal Error when using the loadMemoryFromFileInline

  chipsalliance/firrtl#2649 · Filter by author xlgforever opened on Jul 19, 2023

• Firrtl internal exception for adding LoadMemoryFromFile in generators/rocket-chip/src/main/scala/amba/axi4/SRAM.scala

  chipsalliance/firrtl#2634 · Filter by author chithize opened on Apr 27, 2023

• semantics of multi clock memory

  chipsalliance/firrtl#2612 · Filter by author wky17 opened on Mar 15, 2023

• How to add options while using treadle to make random validif answer?

  chipsalliance/firrtl#2611 · Filter by author wky17 opened on Mar 14, 2023
  2

• Internal error - Crash

  chipsalliance/firrtl#2583 · Filter by author sviraaj opened on Dec 7, 2022
  1

• DeadCodeElimination transform is not working properly.

  chipsalliance/firrtl#2562 · Filter by author poddar92 opened on Oct 14, 2022

• PathNotFoundException in CheckCombLoops transform

  chipsalliance/firrtl#2547 · Filter by author tymcauley opened on Aug 28, 2022

• Unsupported platform: protoc-3.5.1-osx-aarch_64.exe

  chipsalliance/firrtl#2539 · Filter by author ilongshan opened on Aug 10, 2022
  4

• syntax error(s) when parsing low Firrtl

  chipsalliance/firrtl#2537 · Filter by author wky17 opened on Aug 6, 2022

• Dedup causes extra instances to be inlined

  chipsalliance/firrtl#2498 · Filter by author youngar opened on Mar 18, 2022

• Internal error when loading masked memory from file

  chipsalliance/firrtl#2492 · Filter by author zyedidia opened on Mar 12, 2022
  1

• Internal error when running test

  chipsalliance/firrtl#2484 · Filter by author hutch31 opened on Feb 27, 2022
  1

• scala.MatchError when using AttributeAnnotation for a module with several instances

  chipsalliance/firrtl#2479 · Filter by author AlexMontgomerie opened on Feb 8, 2022
  1

• Add Compiler Build Information to Output Verilog

  chipsalliance/firrtl#2461 · Filter by author seldridge opened on Jan 14, 2022
  1

• RemoveResets Doesn't Look Through Nodes

  chipsalliance/firrtl#2435 · Filter by author seldridge opened on Dec 7, 2021

• Missing Constant Folders

  chipsalliance/firrtl#2432 · Filter by author seldridge opened on Dec 3, 2021
  1

• feature request: strength reduction for division or remainder when the denominator is a constant power of two

  chipsalliance/firrtl#2411 · Filter by author ekiwi opened on Nov 10, 2021

• feature request: constant folding for division and remainder

  chipsalliance/firrtl#2410 · Filter by author ekiwi opened on Nov 10, 2021
  1

• [RFC] new cover-values statement to efficiently count mutually-exclusive events

  Feature Request
  chipsalliance/firrtl#2395 · Filter by author ekiwi opened on Oct 25, 2021
  4

  

• Optimized Low Firrtl Emitter should not emit skip statements

  chipsalliance/firrtl#2388 · Filter by author ekiwi opened on Oct 15, 2021
  

• Add option to ignore undeserializable annotations (basically pass them through)

  chipsalliance/firrtl#2384 · Filter by author jackkoenig opened on Oct 11, 2021
  2

  

• Abstract Reset in Uninstantiated Module Crashes without DCE

  bug
  chipsalliance/firrtl#2373 · Filter by author seldridge opened on Sep 28, 2021

• Verilog Emitter: randomize registers by default

  chipsalliance/firrtl#2366 · Filter by author ekiwi opened on Sep 23, 2021 · 1.5.0
  

• Usage instructions for ReplSeqMemsAnnotation are incorrect

  chipsalliance/firrtl#2351 · Filter by author mwachs5 opened on Sep 7, 2021
  1