usb: Emulate USB-OTG controller

clicky-core/src/devices/platform/pp.rs

@@ -20,6 +20,7 @@ mod opto;
 mod ppcon;
 mod rtc;
 mod serial;
+mod usb;
 mod usec_timer;
 mod pwm;
 
@@ -43,6 +44,7 @@ pub use opto::*;
 pub use ppcon::*;
 pub use rtc::*;
 pub use serial::*;
+pub use usb::*;
 pub use usec_timer::*;
 pub use pwm::*;
 

clicky-core/src/devices/platform/pp/usb.rs

@@ -0,0 +1,116 @@
+use crate::devices::prelude::*;
+use bit_field::BitField;
+
+/// ARC/Freescale USB-OTG controller, as found on the PP5020 at 0xc5000000.
+///
+/// Register layout per rockbox's `firmware/target/arm/usb-drv-arc.c`, which
+/// drives this exact core (`USB_BASE` is named in its `pp5020.h`).
+///
+/// This is a stub -- enough for firmware to probe and reset the controller
+/// without hanging, but no endpoints, transfers, or attached host are modelled.
+#[derive(Debug)]
+pub struct Usb {
+    reg: Box<[u32; 0x80]>,
+}
+
+mod reg {
+    /// Run/stop + controller reset.
+    pub const USBCMD: u32 = 0x140;
+    /// Port status & control.
+    pub const PORTSC1: u32 = 0x184;
+    /// Endpoint prime.
+    pub const ENDPTPRIME: u32 = 0x1b0;
+    /// Endpoint flush.
+    pub const ENDPTFLUSH: u32 = 0x1b4;
+
+    /// OTG status & control.
+    pub const OTGSC: u32 = 0x1a4;
+    pub const OTGSC_ID: usize = 8;
+    pub const OTGSC_BSV: usize = 11;
+
+    /// `USBCMD` bit 1. Self-clearing: firmware sets it and spins until the
+    /// controller takes it back down again.
+    pub const USBCMD_CTRL_RESET: usize = 1;
+}
+
+impl Usb {
+    pub fn new() -> Usb {
+        Usb {
+            reg: Box::new([0; 0x80]),
+        }
+    }
+}
+
+impl Device for Usb {
+    fn kind(&self) -> &'static str {
+        "ARC USB-OTG"
+    }
+
+    fn probe(&self, offset: u32) -> Probe {
+        let name = match offset {
+            0x000 => "Id",
+            0x004 => "HwGeneral",
+            0x008 => "HwHost",
+            0x00c => "HwDevice",
+            0x010 => "TxBuf",
+            0x014 => "RxBuf",
+            0x100 => "CapLength",
+            0x120 => "DciVersion",
+            0x124 => "DccParams",
+            0x140 => "UsbCmd",
+            0x144 => "UsbSts",
+            0x148 => "UsbIntr",
+            0x14c => "FrIndex",
+            0x154 => "DeviceAddr",
+            0x158 => "EndpointListAddr",
+            0x160 => "BurstSize",
+            0x170 => "Ulpi",
+            0x180 => "ConfigFlag",
+            0x184 => "PortSc1",
+            0x1a4 => "OtgSc",
+            0x1a8 => "UsbMode",
+            0x1ac => "EndptSetupStat",
+            0x1b0 => "EndptPrime",
+            0x1b4 => "EndptFlush",
+            0x1b8 => "EndptStatus",
+            0x1bc => "EndptComplete",
+            0x1c0..=0x1fc => "EndptCtrl<X>",
+            _ => "?",
+        };
+
+        Probe::Register(name)
+    }
+}
+
+impl Memory for Usb {
+    fn r32(&mut self, offset: u32) -> MemResult<u32> {
+        match offset {
+            reg::PORTSC1 => Err(StubRead(Debug, 0)), // Port status
+            reg::OTGSC => Err(StubRead(Debug, {
+                let mut val = self.reg[(offset / 4) as usize];
+                val.set_bit(reg::OTGSC_ID, true) // Is a peripheral
+                   .set_bit(reg::OTGSC_BSV, true); // Receiving VBUS
+                val
+            })),
+            0x000..=0x1ff => Err(StubRead(Debug, self.reg[(offset / 4) as usize])),
+            _ => Err(Unexpected),
+        }
+    }
+
+    fn w32(&mut self, offset: u32, val: u32) -> MemResult<()> {
+        let val = match offset {
+            reg::USBCMD => {
+                let mut val = val;
+                val.set_bit(reg::USBCMD_CTRL_RESET, false); // USBCMD_CTRL_RESET bit is self-cleared
+                val
+            },
+            reg::ENDPTPRIME | reg::ENDPTFLUSH => 0, // Self-clearing
+            _ => val,
+        };
+
+        match offset {
+            0x000..=0x1ff => Err(StubWrite(Debug, self.reg[(offset / 4) as usize] = val)),
+            _ => Err(Unexpected),
+        }
+    }
+}

clicky-core/src/sys/ipod4g/mod.rs

@@ -331,6 +331,8 @@
     pub timer1: devices::CfgTimer,
     pub timer2: devices::CfgTimer,
     pub usec_timer: devices::UsecTimer,
+    pub firewire: devices::Firewire,
+    pub usb: devices::Usb,
     pub gpio_abcd: ArcMutexDevice<devices::GpioBlock>,
     pub gpio_efgh: ArcMutexDevice<devices::GpioBlock>,
     pub gpio_ijkl: ArcMutexDevice<devices::GpioBlock>,
@@ -356,7 +358,6 @@
     pub mystery_irq_con: devices::Stub,
     pub mystery_lcd_con: devices::Stub,
     pub mystery_flash_stub: devices::Stub,
-    pub firewire: devices::Firewire,
     pub total_mystery: devices::Stub,
     pub pwmcon: devices::PWMCon,
 
@@ -420,6 +421,7 @@
             fastram: AsanRam::new(96 * 1024, true),      // 96 KB
             cpuid: CpuIdReg::new(),
             firewire: Firewire::new(),
+            usb: Usb::new(),
             flash: Flash::new(),
             cpucon: CpuCon::new(task_spawner.clone()),
             hd66753: Hd66753::new(),
@@ -473,7 +475,7 @@
                 fn $fn(&mut self, addr: u32) -> MemResult<$ret> {
                     let mut addr = addr;
                     if (0x00..0x1F).contains(&addr) && self.cachecon.local_evt {
                         addr = addr | 0x6000_f100;
                     }
 
                     let (phys_addr, prot) = self.memcon.virt_to_phys(addr, MemAccessKind::Read);
@@ -621,7 +623,7 @@
         0x7000_3800 => total_mystery,
         0xc031_b1d8 => mystery_flash_stub,
         0xc031_b1e8 => mystery_flash_stub,
-        // Diagnostics program writes 0xffffffff
+        0xc500_0000..=0xc500_01ff => firewire,
         0xc600_0000..=0xc600_01ff => firewire,
         0xffff_fe00..=0xffff_ffff => mystery_flash_stub,