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DAOS-19292 doc: Remove unsafe PMEM_NO_FLUSH guidance#18703

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DAOS-19292 doc: Remove unsafe PMEM_NO_FLUSH guidance#18703
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@knard38 knard38 commented Jul 22, 2026

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Description

docs/admin/performance_tuning.md instructed administrators to manually export PMEM_NO_FLUSH=1 on 3rd Gen Intel® Xeon® Scalable (ICX) systems to "take advantage of" the extended asynchronous DRAM refresh (eADR) feature. This note is removed because it bypasses PMDK's own safe, built-in runtime detection of whether the platform's persistence domain actually covers CPU caches.

PMEM_NO_FLUSH=1 unconditionally forces libpmem to never issue CLFLUSH/CLFLUSHOPT/CLWB instructions, regardless of whether the platform truly guarantees the CPU-cache persistence domain. CPU generation alone is a necessary but not sufficient condition for eADR: BIOS configuration, OEM platform implementation, and hardware health also determine whether eADR is actually active. An administrator who follows this note on a system that matches the CPU generation but does not have eADR enabled/working (e.g. disabled in BIOS, unsupported OEM variant, or a genuine ADR/eADR hardware fault) would silently risk data loss on the next power failure, since PMDK would skip mandatory cache-flush instructions while believing them unnecessary.

PMDK already exposes a safe, automatic alternative, pmem_has_auto_flush(), which queries the platform's actual persistence-domain capability at runtime. PMDK's own libpmem.7 manpage explicitly frames manual overrides like PMEM_NO_FLUSH as testing-only ("largely intended for testing and are not normally required").

A repository-wide search confirms no DAOS source code sets PMEM_NO_FLUSH anywhere; this documentation note was the only occurrence in the daos-stack/daos repository, so no other doc, script, or test config needs to be updated.

Steps for the author:

  • Commit message follows the guidelines.
  • Appropriate Features or Test-tag pragmas were used.
  • Appropriate Functional Test Stages were run.
  • At least two positive code reviews including at least one code owner from each category referenced in the PR.
  • Testing is complete. If necessary, forced-landing label added and a reason added in a comment.

After all prior steps are complete:

  • Gatekeeper requested (daos-gatekeeper added as a reviewer).

docs/admin/performance_tuning.md instructed administrators to
manually export PMEM_NO_FLUSH=1 on 3rd Gen Intel Xeon Scalable (ICX)
systems to take advantage of eADR. This bypasses PMDK's own safe,
runtime detection (pmem_has_auto_flush()) of whether the platform's
persistence domain actually covers CPU caches.

CPU generation is a necessary but not sufficient condition for eADR:
BIOS configuration, OEM platform variants, and hardware health also
affect whether eADR is actually active. Following this note on a
system that matches the CPU generation but does not have eADR
working would silently risk data loss on the next power failure.

Remove the note entirely. No DAOS source code sets PMEM_NO_FLUSH;
this documentation note was the only occurrence in the repository.

Doc-only: true
Signed-off-by: Cedric Koch-Hofer <cedric.koch-hofer@hpe.com>
@knard38 knard38 self-assigned this Jul 22, 2026
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Ticket title is 'Remove unsafe PMEM_NO_FLUSH guidance from performance_tuning.md'
Status is 'In Progress'
https://daosio.atlassian.net/browse/DAOS-19292

@knard38
knard38 marked this pull request as ready for review July 22, 2026 13:59
@knard38
knard38 requested a review from a team as a code owner July 22, 2026 13:59
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