Repository navigation
Irq 6.6.y: phytium: update phytium Irq controller driver support to 6.6.0.4 - #2220
Conversation
There are two hacks needed for IOMMU enablement on Phytium Ps17064 SoC. One is the MSI hack, the other is the SMMU hack. When using this enablement, we assumes that users would set CONIFIG_IOMMU_DEFAULT_PASSTHROUGH=y or pass 'iommu.passthrough=on' or 'iommu.pt' as the kernel command-line parameters. Therefore, we also force default iommu domain type to IOMMU_DOMAIN_IDENTITY on Ps17064 to avoid unnecessary troubles. Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn> Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn> Signed-off-by: Wang Chenlu <wangchenlu2236@phytium.com.cn>
When compiling with the aarch32 compiler, the arm64-specific macros were not defined. Add restriction to bring these macros only into effect on arm64 architecture. Mainline: NA Signed-off-by: Li Mingzhe <limingzhe1839@phytium.com.cn> Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn> Signed-off-by: Wang Chenlu <wangchenlu2236@phytium.com.cn>
Fix the logic in its_irq_compose_msi() where CONFIG_ARCH_PHYTIUM filtering accidentally changed the original behavior. Now iommu_dma_compose_msi_msg() is skipped only on PS17064 SoCs, and executed on all other platforms as intended. Mainline: NA Signed-off-by: Li Mingzhe <limingzhe1839@phytium.com.cn> Signed-off-by: Wang Yinfeng <wangyinfeng@phytium.com.cn> Signed-off-by: Wang Chenlu <wangchenlu2236@phytium.com.cn>
Reviewer's GuideUpdates Phytium IRQ/IOMMU support for PS17064 by applying a CPU-specific SMMU firmware-ID workaround, forcing identity/passthrough IOMMU defaults, and skipping generic IOMMU MSI composition to preserve correct ITS MSI routing. Sequence diagram for Phytium PS17064 IRQ and IOMMU handlingsequenceDiagram
participant Device
participant SMMU as ARM_SMMU
participant IOMMU as IOMMU_Core
participant ITS as GICv3_ITS
Note over IOMMU,SMMU: PS17064 selects identity/passthrough IOMMU domains
Device->>SMMU: arm_smmu_probe_device()
SMMU->>SMMU: iommu_fwspec_add_ids()
SMMU-->>Device: Register with corrected firmware IDs
Device->>ITS: its_irq_compose_msi_msg()
ITS->>ITS: its_get_event_id()
ITS-->>Device: Return ITS MSI message without iommu_dma_compose_msi_msg()
File-Level Changes
Tips and commandsInteracting with Sourcery
Customizing Your ExperienceAccess your dashboard to:
Getting Help
|
|
Hi @wangchenlu2236. Thanks for your PR. I'm waiting for a deepin-community member to verify that this patch is reasonable to test. If it is, they should reply with Once the patch is verified, the new status will be reflected by the I understand the commands that are listed here. DetailsInstructions for interacting with me using PR comments are available here. If you have questions or suggestions related to my behavior, please file an issue against the kubernetes/test-infra repository. |
|
[APPROVALNOTIFIER] This PR is NOT APPROVED This pull-request has been approved by: The full list of commands accepted by this bot can be found here. DetailsNeeds approval from an approver in each of these files:Approvers can indicate their approval by writing |
There was a problem hiding this comment.
🟡 Changes recommended
Unresolved issues affect firmware-spec memory safety, stream mapping correctness, non-Arm compilation, and MSI delivery in translated domains.
5 open issues
What changed in this PR
This PR updates Phytium PS17064 support in the kernel’s IOMMU and interrupt-controller code, adding an SMMU workaround and changing MSI address handling.
Changes:
- Append read-side stream-ID aliases for the PS17064 SMMU workaround.
- Force identity-domain defaults on PS17064 systems.
- Bypass IOMMU MSI address composition on PS17064 CPUs.
| File | Description |
|---|---|
| drivers/irqchip/irq-gic-v3-its.c | Adds the PS17064 MSI composition bypass. |
| drivers/iommu/iommu.c | Selects identity domains for PS17064 systems. |
| drivers/iommu/arm/arm-smmu/arm-smmu.h | Adds the CPU header and stream-ID alias macro. |
| drivers/iommu/arm/arm-smmu/arm-smmu.c | Appends PS17064 stream aliases during device probing. |
Review effort: Balanced
| for (i = 0; i < num; i++) { | ||
| u32 fwid = FWID_READ(fwspec->ids[i]); | ||
|
|
||
| iommu_fwspec_add_ids(dev, &fwid, 1); |
| #ifndef _ARM_SMMU_H | ||
| #define _ARM_SMMU_H | ||
|
|
||
| #include <asm/cputype.h> |
| #ifdef CONFIG_ARCH_PHYTIUM | ||
| if ((read_cpuid_id() & MIDR_CPU_MODEL_MASK) == MIDR_PHYTIUM_PS17064) | ||
| return; | ||
| #endif | ||
| iommu_dma_compose_msi_msg(irq_data_get_msi_desc(d), msg); |
| int num = fwspec->num_ids; | ||
|
|
||
| for (i = 0; i < num; i++) { | ||
| u32 fwid = FWID_READ(fwspec->ids[i]); |
| #include <linux/types.h> | ||
|
|
||
| #ifdef CONFIG_ARCH_PHYTIUM | ||
| #define FWID_READ(id) (((u16)(id) >> 3) | (((id) >> 16 | 0x7000) << 16)) |


This patches updates the support for phytium Irq controller driver.
2.Phytium: Slove the error on aarch32 compiler
Summary by Sourcery
Improve Phytium PS17064 IOMMU and interrupt-controller compatibility for the 6.6 kernel.
Bug Fixes:
Enhancements: