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Provided Plugins

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julianspeith edited this page Aug 17, 2026 · 8 revisions

HAL ships with a curated set of plugins, most of which were developed for our own research and are now provided as open source for everyone to try and evaluate on their own netlists. Some of them extend HAL's reverse engineering capabilities, while others implement functionality that feels like part of HAL itself — the GUI, the netlist and gate library parsers and writers, and the default gate libraries are all plugins.

This page is the complete index of what is included. To add your own, see Create your own Plugins.

Not everything is built by default. Plugins marked ❌ below require -DBUILD_ALL_PLUGINS=ON or their individual CMake flag, see Building HAL. A plugin that was not built simply will not appear in HAL — if something is missing from the Plugin Manager, that is almost always why. Running hal -h lists the command line options of every plugin present in your build.

Analysis

Plugin Description CMake flag Default
Dataflow Analysis DANA — recover word-level structures such as registers from gate-level netlists PL_DATAFLOW ❌
Module Identification Identify word-level operations such as additions, counters, and comparisons PL_MODULE_IDENTIFICATION ❌
HAWKEYE Locate arbitrary symmetric cryptographic implementations in gate-level netlists PL_HAWKEYE ❌
Bitorder Propagation Propagate known bit orders to module pin groups of unknown bit order PL_BITORDER_PROPAGATION ❌
Solve FSM Generate state transition graphs for finite state machines PL_SOLVE_FSM ✅
Graph Algorithms Graph algorithms based on igraph, operating on a netlist graph abstraction PL_GRAPH_ALGORITHM ✅
Boolean Influence Measure how much each input actually affects the output of a function PL_BOOLEAN_INFLUENCE ❌

Execution and verification

The simulator is not a single plugin but a group of four, listed below in the order they take part in a simulation run. PL_SIMULATOR builds all of them together and is the flag you normally want; the individual flags exist for finer control. All four are documented on one page, Netlist Simulator and Waveform Viewer.

Plugin Description CMake flag Default
(group) Netlist Simulator and Waveform Viewer Builds all four simulator plugins below PL_SIMULATOR ❌
Netlist Simulator Controller Orchestrates a simulation run and provides the common API: gate selection, clocks, input data, results PL_NETLIST_SIMULATOR_CONTROLLER ❌
Verilator Engine Runs the actual simulation via external Verilator. The recommended engine PL_VERILATOR ❌
HAL Simulator Engine The built-in event-driven engine. Has known issues and is kept for testing and comparison PL_NETLIST_SIMULATOR ❌
Waveform Viewer Displays and analyzes simulation results as waveforms inside the GUI PL_WAVEFORM_VIEWER ❌

Other plugins in this category:

Plugin Description CMake flag Default
Logic Evaluator Interactively evaluate the behavior of purely combinational subcircuits PL_LOGIC_EVALUATOR ❌
Z3 Utilities SMT solving via Z3, including formal equivalence checking PL_Z3_UTILS ✅
Sequential Symbolic Execution Symbolic execution spanning multiple cycles, including sequential gates PL_SEQUENTIAL_SYMBOLIC_EXECUTION ❌

Netlist transformation

Plugin Description CMake flag Default
Netlist Preprocessing Preprocessing passes that clean up a netlist for further analysis PL_NETLIST_PREPROCESSING ✅
Resynthesis Decompose or re-synthesize combinational parts of a netlist onto a reduced gate set PL_RESYNTHESIS ❌
Xilinx Toolbox Functions specifically designed to operate on Xilinx FPGA netlists PL_XILINX_TOOLBOX ❌

Input and output

Plugin Description CMake flag Default
Verilog Parser Read structural Verilog netlists (.v) PL_VERILOG_PARSER ✅
VHDL Parser Read structural VHDL netlists (.vhd, .vhdl) PL_VHDL_PARSER ✅
Verilog Writer Write a netlist back out as structural Verilog (.v) PL_VERILOG_WRITER ✅
GEXF Writer Export a netlist as a GEXF graph (.gexf) for external graph tools PL_GEXF_WRITER ✅
Liberty Parser Read gate libraries in the industry-standard liberty format (.lib) PL_LIBERTY_PARSER ✅
HGL Parser Read gate libraries in HAL's own HGL format (.hgl) PL_HGL_PARSER ✅
HGL Writer Write gate libraries in HAL's own HGL format (.hgl) PL_HGL_WRITER ✅
Genlib Writer Write gate libraries in the genlib format used by Berkeley ABC (.genlib) PL_GENLIB_WRITER ❌
Gate Libraries The gate library definitions shipped with HAL PL_GATE_LIBRARIES ✅

User interface

Plugin Description CMake flag Default
GUI The graphical frontend for visual netlist inspection and interactive analysis PL_GUI ✅
Python Shell Use the HAL Python API from the command line, without the GUI PL_PYTHON_SHELL ✅
Dot Viewer Interactive display of Graphviz .dot files produced by other plugins PL_DOT_VIEWER ✅

Development and testing

These are not analysis tools and are of interest mainly to HAL developers.

Plugin Description CMake flag Default
GUI Extension Demo Example showing how to extend the GUI menu with pluggable Python scripts PL_GUI_EXTENSION_DEMO ❌
Perf Test Performance testing harness PL_PERF_TEST ❌

Notes

  • Some plugins depend on others. Resynthesis, for instance, needs the genlib writer to hand a gate library to Yosys. Building with -DBUILD_ALL_PLUGINS=ON avoids having to track this yourself.
  • Some plugins need external tools at runtime. Simulation requires Verilator, and resynthesis requires Yosys.
  • Building a plugin is not the same as activating it. Some plugins additionally need to be enabled in the Plugin Manager (main menu > Utilities), which requires restarting HAL.

See also

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