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analog M4e-kick: derive the comparator's clock-edge kick on the two top plates from the plates' drive -- predict the six first-decision rows of #10888 (Part of #10888) #10942
Description
Goal
Part of #10888 (M4e-offset), #10818, epic #10486. #10888's experiments (specs/analog/decks/sar_off_*.cir, data in specs/analog/sar_kick.t27, PR in #10941) found the converter's decision offset is the comparator's clock-edge kickback read through two top plates of unequal stiffness: at clkc = 0.75 V VDP has fallen by 22.7 mV and VDN by 30.2 mV (7.5 mV apart); with ideal bottom plates both fall by 6.87 mV and the offset is the latch's 0.153 mV. The N half's bottom plates sit behind one more transmission gate (neg_bottom_plate_logic x11 idle, x15 moved) than the P half's: a 2592 ohm resistor (a golden tgate's own, measured by sar_off_ron.cir) added to each P plate takes the first decision's offset from +9.42 to -0.89 mV. The kick is MEASURED there, not derived, and the model's offset (6.776 mV, the mean of the last two decisions' flips) is a measurement of the netlist. Derive it: a circuit-level model of the plates' drive and the comparator's charge pulse, with no fitted number, that predicts the kicks and the offsets.
Boundary
- A new block spec (
specs/analog/sar_kick_net.t27) and the decks it needs underspecs/analog/decks/; it uses M1 (linear.t27, the fixed-step linear solve), M3b's current tables (mos_psp103*.t27: the on-resistances of the drivers' inverters and tgates at their bias) and M3c's charge tables (analog M3c-1: PSP103 drain and gate charge tables (tt, ss) and the 500 fF inverter against ngspice backward Euler #10880, PR analog: PSP103 drain and gate charge tables (tt, ss), the charge-aware table solver, the 500 fF inverter within 0.02 % of ngspice (Closes #10880) #10893: the comparator input pair's gate-source and gate-drain charge) and M4a's capacitor network (sar_cdac.t27). sar_adc.t27may switch its offset source fromoff_late_v()(measured) to the derived value; nothing else of it changes.- Not touched:
sar_logic.t27,sar_comparator*.t27.
Scenarios
- Given the DAC's 63 unit capacitors, the ten bottom plates of each half driven through their inverter and transmission-gate resistances from the PSP103 tables, and the comparator's edge charge, When the clock edge of the first decision is stepped, Then dVDP and dVDN at clkc = 0.75 V are within 10 percent of -22.7 mV and -30.2 mV.
- Given the same network with every bottom plate an ideal source, Then both plates fall within 5 percent of 6.87 mV and differ by under 0.1 mV.
- Given the N half's (P half's) bottom plates ideal, Then the kick differential is within 15 percent of -20.5 mV (+35.9 mV).
- Given a resistor of 1300, 2592 or 3900 ohm between each P plate and its Bit_k node, Then the first decision's offsets are within 1 mV of +4.09, -0.89 and -4.19 mV and cross the latch's 0.153 mV between 2200 and 2450 ohm.
- Given decisions 9 and 10 with nine and ten plates moved, Then the derived offset is within 0.2 mV of the measured 6.66 mV and 6.90 mV.
Requirements
- FR-001: every parameter comes from the netlist (counts, W/L, the 122.94 fF unit), the PSP103 tables of M3b and M3c, or an ngspice measurement on a committed deck; no number is fitted to the codes or to the kicks being predicted.
- FR-002: the charge pulse of the comparator's input pair is derived from its tail node and drain waveforms and the charge tables, and the plates' response is M1's linear step on the DAC network with the drivers' resistances.
- FR-003: the first plate step's dependence on the drive (the top-plate load Cp read from it is 0.58 units with ideal plates, 0.62, 0.69 and 0.85 with 1300, 2592 and 3900 ohm on the P plates, and the golden circuit's raised and lowered steps differ by 2.85 mV) is explained by the same network or named as the next gap.
Success Criteria
-
t27c test-report specs/analog/sar_kick_net.t27exits 0 with FAIL 0 and 0 vacuous passes; its tests assert the scenarios' numbers above against the pinned values ofsar_kick.t27(KICK_P,KICK_N,FLIP_LO,FLIP_HI,RS_*,late_thr). - The derived first-decision offsets of the rows are within 1 mV of 9.42, 9.19, 0.03, -25.79, +43.87, 0.27 and -0.89 mV, and in the order P ideal > golden > symmetric = comparator isolated > N ideal.
-
sar_adc.t27takes its late offset from the derived value, and its test prints31 conversions: N matcheswith N at least 29 and Cp unchanged (M4e's 0.63). -
tri types ratchetprintsRATCHET: CLEAN;t27c seal --verifyMATCH for every spec touched.
Activity
analog M4e-offset: the converter's offset is the comparator's clock-e…
analog M4e-kick (partial): four ngspice decks for the comparator cloc…
gHashTag commentedon Oct 19, 2026
The full aperture scan of the golden comparator (deck specs/analog/decks/sar_kick_aperture.cir from PR #11092) ran to the end on the remote Docker host as a container job (image t27-ngspice:47-osdi, ngspice-47, 4 threads): 20 of 20 transients, exit 0, container started 18:13 and the log last written 18:14 on the host clock, load average 0.06 on the host afterwards. On the laptop under load the same deck had completed 4 of 20 transients in about 45 minutes before it was stopped. Columns: the step time tau, then dd and de, the two latch outputs in volts at the read time (the response is dd - de); LINEAR rows are the 0, 0.5 mV and 2 mV step-size checks at 98.3069 ns.
Next for this issue: pin this table in specs/analog/sar_kick_net.t27, write the network spec, then rerun the late-decision rows (S5). Source: the host job log, kept in the session scratch; the deck and the commands are in PR #11092.
analog M4e-kick (partial): four ngspice decks for the comparator's cl…
analog M4e-kick (partial): sar_kick_net.t27 derives the comparator's …
gHashTag commentedon Oct 19, 2026
PR #11124 merged:
specs/analog/sar_kick_net.t27(20 tests, vacuous 0) derives the comparator's clock-edge kick on both top plates from the plates' drive. Scenarios S1 to S4 and the seven first-decision offsets are met (kicks within 1.3 to 8.1 percent against 10 and 15 asked; the seven offsets within 1 mV and in the right order).S5 (the late decisions of the converter) is NOT met, so this issue stays open and
sar_adc.t27is untouched: of four late-decision offsets three are within 0.2 mV and one misses by 0.29 mV (decision 10 of the second conversion, model A; model B misses decision 9 by 0.24 mV). The two named gaps for the next lane, from the spec header: (1) the bit path: the model's two paths differ by 0.2 mV at decision 9 where ngspice's 28 agree within 0.05 mV; (2) decision 10 against decision 9: +0.24 mV measured, +0.03 mV in the model. Also open: the dependence of the ideal-plate top load Cp on the drive (0.62, 0.69, 0.85 units against 0.579 derived).analog M4e-kick S5 (partial): ngspice's own balance at decisions 9 an…
gHashTag commentedon Oct 19, 2026
Second lane on S5, PR #11158 (open when posted):
sar_kick_net.t27now has 23 tests (was 20), vacuous 0. The late decisions were read in ngspice's own run: model A against that in-situ balance is within 0.2 mV at all four decisions (differences -0.154, -0.130, -0.141 and -0.165 mV). Against the pooled thresholds of this issue (6.66 and 6.90 mV) S5 is still 3 of 4 (decision 10 of the second conversion is 0.29 mV low), so this issue stays open andsar_adc.t27is untouched.Gap 2 (decision 10 against 9) is closed by measurement and is not a circuit effect: within each conversion ngspice's balance is the same at 9 and 10 (7 and 3 uV apart), the 0.24 mV between the pooled thresholds comes from different bit paths pinning each pooled bracket. Gap 1 (bit path) is real: the balance depends on the bit path by 0.48 mV, the model has 71 percent of that spread and sits 0.10 to 0.29 mV below ngspice on every DC path. Open for the next lane: a path-independent 0.15 mV, the common-mode step rows, the time-varying gate capacitance (59 fF until 1.5 ns after the crossing, 130 to 150 fF from 3 to 4.5 ns; it lowers the late offsets by 0.1 to 0.17 mV but worsens the first-decision kicks by 3 to 5 percent), and the kick against D (ngspice 0.10 mV per mV, the model 0.02 to 0.05).
analog M4e-kick S5 (partial): the late decisions read in ngspice's ow…