feat(fpga): tri CLI integration for openXC7 GF16 flow #1286

Add tri fpga synth-gf16 / load-sram / stat subcommands, bootstrap nextpnr-xilinx and xc7a200tfbg676-1 chipdb, and verify GF16 matrix bitstream loads into XC7A200T SRAM with DONE=HIGH.

User Scenarios

• Given the tri CLI is installed and the openXC7 toolchain (nextpnr-xilinx, xc7a200tfbg676-1 chipdb) is available, When the user runs tri fpga synth-gf16, Then the GF16 matrix design is synthesized to a bitstream targeting XC7A200T.
• Given a GF16 bitstream has been synthesized, When the user runs tri fpga load-sram, Then the bitstream is loaded into XC7A200T SRAM and the DONE pin goes HIGH.
• Given the bitstream is loaded in SRAM, When the user runs tri fpga stat, Then the command reports DONE=HIGH and valid GF16 configuration status.

Requirements

FR-001: The tri fpga command MUST expose synth-gf16, load-sram, and stat subcommands.
FR-002: The synth-gf16 subcommand MUST invoke nextpnr-xilinx with the xc7a200tfbg676-1 chipdb to produce a GF16 bitstream.
FR-003: The load-sram subcommand MUST program the generated bitstream into XC7A200T SRAM and verify DONE=HIGH.
FR-004: The stat subcommand MUST read and report the FPGA configuration status including DONE pin state.
FR-005: The GF16 flow specification MUST define the openXC7 synthesis, loading, and verification steps.

Success Criteria

• tri fpga synth-gf16 completes and produces a bitstream file at build/gf16.bit (exit 0)
• tri fpga load-sram programs the bitstream and reports DONE=HIGH (exit 0)
• tri fpga stat outputs JSON containing "done": true (exit 0)
• 3 integration tests in specs/tools/tri/fpga.t27 pass (exit 0)

Boundary

• specs/tools/tri/fpga.t27
• specs/xilinx7/flow.t27
• specs/numeric/gf16.t27
• cli/tri/src/fpga.rs