master suite red: 9 batch-merged ports fail gen-verilog on a Zig-spelled string array #7393

Master is red on the t27c lab's suite gate since 223c28c (first red run; 28314f1 at 06:41Z was the last green one). The ratchet reports 9 unexpected failures against a 77/77 ledger (86 observed), for example https://t27c-lab-production.up.railway.app/runs/e45ba566d08f5bb36de304ca7061a202d37d58de.json.

What fails

All 9 are ported specs merged in the 2026-10-07 07:21-07:29Z batch (#6902, #6983, #6986, #7047, #7086, #7101, #7141, #7157, #7287). Their Corpus ratchet check was red at an earlier step ("A type name may not gain a second definition", the Rng conflict), so the suite step never ran on them before merge.

Eight fail gen-verilog with the same message:

unsupported multi-dimensional array of aggregate type `[3][]const u8` for local variable `short_args` ...
2-D array-of-struct lowering is not yet implemented (W469)

• specs/port/bootstrap/src/compiler/HirIpCatalog_new.t27 (items: [65][]const u8)
• specs/port/bootstrap/src/enrichment/mod.t27 (args: [4][]const u8, notebooks: [10][]const u8)
• specs/port/browseros/trios/agent-server/apps/server/src/tools/tool-registry.t27 (names: [MAX_SIZE][]const u8)
• specs/port/scripts/check_first_party_doc_language.t27
• specs/port/scripts/gen_w309.t27
• specs/port/trinity/src/cli/railway_create_full.t27
• specs/port/trinity/src/phi-engine/vibeec_original/tnc.t27
• specs/port/trinity/src/vibeec/gen_cmd_simple.t27

One fails verilog-no-keyword-decl: specs/port/scripts/gen_w391.t27 binds a tuple element to a local named end in two tests, and the generated Verilog declares end unescaped (lines 350 and 431).

Root cause

Not a compiler regression: no compiler commit between the green and the red run touches gen-verilog, and every failing spec is new. The ports spell a string array the Zig way, [N][]const u8. The Verilog guard reads the slice brackets as a second array dimension and refuses it as a 2-D array of aggregates. The same specs already declare the parameters these arrays are passed to as []str, and t27's own spelling [N]str is a 1-D array of strings that every backend lowers.

Fix

Spell the arrays [N]str in the 8 specs, and rename the two end bindings in gen_w391 to stop. Measured on the lab with the master t27c: all 9 specs now pass typecheck, gen, gen-rust, gen-c and gen-verilog. The Zig output is byte-identical except the renamed binding. The C output improves from the invalid []const u8 args[4] to const char* args[4], and the Rust output from Vec<const u8> to [&'static str; 65]. No ledger entry is added and the cap stays at 77.

Follow-ups, not in this change: the same Zig spelling keeps 4 older ledgered ports red (tri-issue-create, validation_engine, health_check, railway_create_project, under #5549). gen-verilog does not escape a keyword bound by a tuple destructuring.