bench job: ternary_link through t27c bench-agent (first agent run) #8156

A silicon job for t27c bench-agent (#8153, PR #8155). It is the first run through the agent. ternary_link already has R3-3; this run tests the agent path end to end with a fresh challenge.

spec: specs/fpga/ternary_link.t27
top: fpga/verilog/ternary_link_jtag.v
nonce: 3767acdc99f6b0f189ec25048257e840
seed: 11

Each agent runs this only after the owner comments /bench approve on this issue. It loads SRAM only, and it answers with one comment carrying its signed receipt.

User Scenarios

• Given the spec specs/fpga/ternary_link.t27 and top module fpga/verilog/ternary_link_jtag.v with nonce 3767acdc99f6b0f189ec25048257e840 and seed 11, when the owner comments /bench approve on this issue, then the bench-agent runs the job end-to-end and posts a signed receipt comment.

Requirements

• FR-001: The bench-agent MUST load SRAM only for this run.
• FR-002: The bench-agent MUST execute using t27c bench-agent with the given spec, top, nonce, and seed.
• FR-003: The bench-agent MUST post exactly one comment containing its signed receipt upon completion.

Success Criteria

• t27c bench-agent --spec specs/fpga/ternary_link.t27 --top fpga/verilog/ternary_link_jtag.v --nonce 3767acdc99f6b0f189ec25048257e840 --seed 11 exits with exit 0
• 1 signed receipt comment appears on issue bench job: ternary_link through t27c bench-agent (first agent run) #8156

Boundary

• specs/fpga/ternary_link.t27
• fpga/verilog/ternary_link_jtag.v
• specs/tools/trinity/tri/bench.t27
• specs/port/trios/crates/trios-cli/src/cmd/agent.t27
• bootstrap/t27c.py
• cli/t27b/bench/bench.py
• contrib/backend/agent-runner/src/agent.rs