t27b: ternary_gates and arty_a7_integration block on 'type mismatch' after c7570433e made their bench bodies type-check #8546

Part of epic #8326 (coverage, see #6063).

c757043 (see #8195) made the bench bodies of 8 specs type-check once referenced. Since then t27b refuses two specs it passed before with type mismatch:

• specs/isa/ternary_gates.t27 (passing since t27b: an untyped list local that the code indexes lowers as a tuple, from a t27 plan (Closes #8050) #8055)
• specs/fpga/boards/arty_a7_integration.t27

Master's native ratchet at c9d36f3 reports both as UNEXPECTED FAILURE. t27b did not change; the specs did. The ledger records them as blocked with reason unimplemented until t27b lowers the new bench bodies.

Acceptance: both specs pass under t27b --check with runtime asserts, and their ledger rows return to pass. Net <= 0 hand-written lines under cli/t27b (#8236).

User Scenarios

• Given the specs specs/isa/ternary_gates.t27 and specs/fpga/boards/arty_a7_integration.t27 have bench bodies that now type-check after commit c757043, When running t27b --check on each spec, Then t27b lowers the bench bodies without type mismatch errors and both specs pass.

Requirements

FR-001: t27b MUST lower the bench bodies of specs/isa/ternary_gates.t27 and specs/fpga/boards/arty_a7_integration.t27 without type mismatch errors.
FR-002: The ledger rows for both specs MUST return to pass status.
FR-003: Net hand-written lines under cli/t27b MUST be <= 0 (no net increase).

Success Criteria

• t27b --check specs/isa/ternary_gates.t27 exits with exit 0
• t27b --check specs/fpga/boards/arty_a7_integration.t27 exits with exit 0
• Ledger shows 2 specs previously blocked now pass (2 tests)
• Net lines changed in cli/t27b <= 0 lines

Boundary

• specs/isa/ternary_gates.t27
• specs/fpga/boards/arty_a7_integration.t27
• cli/t27b/bench/bench.py
• scripts/tri_loop/t27b.py