analog: sar_comparator.t27 -- the SAR ADC dynamic comparator, multi-node Newton, square law against ngspice LEVEL=1 (Closes #10583)

.trinity/seals/analog_AnalogSarComparator.json

@@ -0,0 +1,37 @@
+{
+  "built_by": "t27c-bootstrap@0.5.2+9b556b7c3",
+  "closure": [
+    {
+      "spec": "specs/analog/linear.t27",
+      "spec_hash": "sha256:3ddef7be183aba583ed285334ee389b48a65b41335e98914514235db7c4e5d62"
+    },
+    {
+      "spec": "specs/analog/mos_table.t27",
+      "spec_hash": "sha256:168cd93374cec92ece02ddab1be51f49308d9efd3288ac0427f912d4a7521782"
+    }
+  ],
+  "config": "gen=c,rust,verilog,zig;tests=zig",
+  "gen_hash_c": "sha256:e6f3677d7f54078eabbdd3e3786cd6028cb0445eb4cf8f05b313a3d4ff618225",
+  "gen_hash_rust": "sha256:0b7f0fe869197f808776e207bceee2075fd591d253ced3f2ac9f6c6c6cd62f97",
+  "gen_hash_verilog": "sha256:bab3512235c19a5adbe9a9149e589999fc93bbac49484ff62864ed7dae37e140",
+  "gen_hash_zig": "sha256:ac367deed0470ab29568a4caa691a067ad8d341b9f6e5d356be531a026506510",
+  "module": "AnalogSarComparator",
+  "ring": 12,
+  "seal_schema": 2,
+  "sealed_at": "2026-10-18T18:44:35Z",
+  "sealed_by": "t27c-bootstrap@0.5.2",
+  "spec_hash": "sha256:2df42ed0afe41add0b43762dfa05c8aa38ecbc022bea8f7bbd72f55917bcb806",
+  "spec_path": "specs/analog/sar_comparator.t27",
+  "tests": {
+    "failed": 0,
+    "failing": [],
+    "forced": false,
+    "passed": 20,
+    "total": 20,
+    "vacuous": 0
+  },
+  "toolchain": {
+    "test_runner": "sha256:8512b80da533b79289110fca4a65f3336abd7a059ca4b72ea595d5e33ff8ad10",
+    "zig": "0.16.0"
+  }
+}

specs/analog/decks/sar_cmp_m05.cir

@@ -0,0 +1,63 @@
+SAR ADC dynamic comparator, m05: VDP - VDN = -0.5 mV, backward Euler on a fixed 0.1 ps grid, MOSFET LEVEL=1
+* specs/analog/decks/sar_cmp_m05.cir -- test data for specs/analog/sar_comparator.t27 (#10583). A plain netlist, no .control block.
+* Circuit: the dynamic_comparator subcircuit of the uberWAVE golden SAR deck (wp2-parser/golden/top.spice; GPL-2.0, read at
+* run time and never vendored) -- thirteen transistors, M1..M13 here for its XM1..XM13, with the W, L and m of that deck --
+* plus the inverter x1 that makes n_clkc from clkc (Mip, Min). Square law: MOSFET LEVEL=1 (Shichman-Hodges), KP 300 uA/V^2 (n)
+* and 100 uA/V^2 (p), VTO +-0.35 V, LAMBDA 0, GAMMA 0. beta = KP W / L = 666.7 uA/V^2 per unit m for both types (n: 1u / 0.45u,
+* p: 3u / 0.45u). The model sets no TOX, CGSO, CGDO or CJ, so the only capacitance is the explicit one: 4 fF on ap, an, dp, dn;
+* 6 fF on net1; 2 fF on net2, net3 and nclk. This is the SQUARE LAW, not PSP103.
+* Inputs: VDD 1.5 V, common mode 0.75 V, VDP and VDN as written below (units of 2^-24 V: 4194 per side, so the difference
+* is 8388 units = 0.49996 mV). The clock is a B source (it declares no breakpoint): 0 for the first 10 grid points, then a
+* ramp of 16 steps of 1.5/16 V, then 1.5 V. nint(time/dt) picks the grid index whatever the offset of ngspice's opening ramp.
+* The circuit rests until the clock moves: ap = an = net2 = net3 = nclk = 1.5 V, dp = dn = 0, net1 = max(VDP, VDN) - 0.35 V
+* (the higher input device sits at threshold, so no current flows; 0.35 V is taken as 5872026 units of 2^-24 V, the spec's own
+* rounding of it, so that the deck and the spec start from the same word).
+* Fixed step: gear with maxord 1 is backward Euler, trtol 1e7 stops the truncation test from shrinking a step; reltol, vntol,
+* abstol and gmin are tightened so Newton ends far below the 1e-6 V the spec compares. Step j of the run (j = 1..140) ends at the
+* grid point with nint(time/dt) = j + 10. Probe sources: mx = max(dp, dn), diff = |dp - dn| (a B source senses without loading).
+* Measured (printed by the .meas lines): tck, the clock through 0.75 V; tfirst, the first output through 0.75 V; tres, |dp - dn|
+* through 0.75 V; dpmax and dnmax, the highest value each output reaches (the loser's peak); dpend and dnend, the outputs at the
+* last point. Decision time = tfirst - tck; resolution time = tres - tck.
+* Run: ngspice -b sar_cmp_m05.cir   (do not add -r: ngspice refuses .meas together with a raw file)
+.model nmos1 nmos level=1 vto=0.35 kp=300u lambda=0 gamma=0
+.model pmos1 pmos level=1 vto=-0.35 kp=100u lambda=0
+Vdd vdd 0 1.5
+Vdp vdp 0 0.749750018119812
+Vdn vdn 0 0.750249981880188
+Bclk clkc 0 V = 1.5*min(max(nint(time/1e-13)-10,0),16)/16
+M1 ap clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M2 an clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M3 ap vdn net1 0 nmos1 w=1u l=0.45u m=36
+M4 an vdp net1 0 nmos1 w=1u l=0.45u m=36
+M5 net1 clkc 0 0 nmos1 w=1u l=0.45u m=18
+M6 net2 dp vdd vdd pmos1 w=3u l=0.45u m=30
+M7 net3 dn vdd vdd pmos1 w=3u l=0.45u m=30
+M10 dn dp 0 0 nmos1 w=1u l=0.45u m=12
+M11 dp dn 0 0 nmos1 w=1u l=0.45u m=12
+M12 dn nclk 0 0 nmos1 w=1u l=0.45u m=6
+M13 dp nclk 0 0 nmos1 w=1u l=0.45u m=6
+M8 dp an net3 vdd pmos1 w=3u l=0.45u m=30
+M9 dn ap net2 vdd pmos1 w=3u l=0.45u m=30
+Mip nclk clkc vdd vdd pmos1 w=3u l=0.45u m=1
+Min nclk clkc 0 0 nmos1 w=1u l=0.45u m=1
+Cap ap 0 4f
+Can an 0 4f
+Cn1 net1 0 6f
+Cn2 net2 0 2f
+Cn3 net3 0 2f
+Cdp dp 0 4f
+Cdn dn 0 4f
+Cnc nclk 0 2f
+Bmx mx 0 V = max(v(dp),v(dn))
+Bdiff diff 0 V = abs(v(dp)-v(dn))
+.ic v(ap)=1.5 v(an)=1.5 v(net1)=0.4002499580383301 v(net2)=1.5 v(net3)=1.5 v(dp)=0 v(dn)=0 v(nclk)=1.5
+.options method=gear maxord=1 trtol=1e7 reltol=1e-10 vntol=1e-13 abstol=1e-16 gmin=1e-15 itl4=200
+.tran 0.1p 15.5p 0 0.1p uic
+.meas tran tck when v(clkc)=0.75 rise=1
+.meas tran tfirst when v(mx)=0.75 rise=1
+.meas tran tres when v(diff)=0.75 rise=1
+.meas tran dpmax max v(dp)
+.meas tran dnmax max v(dn)
+.meas tran dpend find v(dp) at=15.5p
+.meas tran dnend find v(dn) at=15.5p
+.end

specs/analog/decks/sar_cmp_m2.cir

@@ -0,0 +1,63 @@
+SAR ADC dynamic comparator, m2: VDP - VDN = -2 mV, backward Euler on a fixed 0.1 ps grid, MOSFET LEVEL=1
+* specs/analog/decks/sar_cmp_m2.cir -- test data for specs/analog/sar_comparator.t27 (#10583). A plain netlist, no .control block.
+* Circuit: the dynamic_comparator subcircuit of the uberWAVE golden SAR deck (wp2-parser/golden/top.spice; GPL-2.0, read at
+* run time and never vendored) -- thirteen transistors, M1..M13 here for its XM1..XM13, with the W, L and m of that deck --
+* plus the inverter x1 that makes n_clkc from clkc (Mip, Min). Square law: MOSFET LEVEL=1 (Shichman-Hodges), KP 300 uA/V^2 (n)
+* and 100 uA/V^2 (p), VTO +-0.35 V, LAMBDA 0, GAMMA 0. beta = KP W / L = 666.7 uA/V^2 per unit m for both types (n: 1u / 0.45u,
+* p: 3u / 0.45u). The model sets no TOX, CGSO, CGDO or CJ, so the only capacitance is the explicit one: 4 fF on ap, an, dp, dn;
+* 6 fF on net1; 2 fF on net2, net3 and nclk. This is the SQUARE LAW, not PSP103.
+* Inputs: VDD 1.5 V, common mode 0.75 V, VDP and VDN as written below (units of 2^-24 V: 16777 per side, so the difference
+* is 33554 units = 1.99997 mV). The clock is a B source (it declares no breakpoint): 0 for the first 10 grid points, then a
+* ramp of 16 steps of 1.5/16 V, then 1.5 V. nint(time/dt) picks the grid index whatever the offset of ngspice's opening ramp.
+* The circuit rests until the clock moves: ap = an = net2 = net3 = nclk = 1.5 V, dp = dn = 0, net1 = max(VDP, VDN) - 0.35 V
+* (the higher input device sits at threshold, so no current flows; 0.35 V is taken as 5872026 units of 2^-24 V, the spec's own
+* rounding of it, so that the deck and the spec start from the same word).
+* Fixed step: gear with maxord 1 is backward Euler, trtol 1e7 stops the truncation test from shrinking a step; reltol, vntol,
+* abstol and gmin are tightened so Newton ends far below the 1e-6 V the spec compares. Step j of the run (j = 1..140) ends at the
+* grid point with nint(time/dt) = j + 10. Probe sources: mx = max(dp, dn), diff = |dp - dn| (a B source senses without loading).
+* Measured (printed by the .meas lines): tck, the clock through 0.75 V; tfirst, the first output through 0.75 V; tres, |dp - dn|
+* through 0.75 V; dpmax and dnmax, the highest value each output reaches (the loser's peak); dpend and dnend, the outputs at the
+* last point. Decision time = tfirst - tck; resolution time = tres - tck.
+* Run: ngspice -b sar_cmp_m2.cir   (do not add -r: ngspice refuses .meas together with a raw file)
+.model nmos1 nmos level=1 vto=0.35 kp=300u lambda=0 gamma=0
+.model pmos1 pmos level=1 vto=-0.35 kp=100u lambda=0
+Vdd vdd 0 1.5
+Vdp vdp 0 0.7490000128746033
+Vdn vdn 0 0.7509999871253967
+Bclk clkc 0 V = 1.5*min(max(nint(time/1e-13)-10,0),16)/16
+M1 ap clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M2 an clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M3 ap vdn net1 0 nmos1 w=1u l=0.45u m=36
+M4 an vdp net1 0 nmos1 w=1u l=0.45u m=36
+M5 net1 clkc 0 0 nmos1 w=1u l=0.45u m=18
+M6 net2 dp vdd vdd pmos1 w=3u l=0.45u m=30
+M7 net3 dn vdd vdd pmos1 w=3u l=0.45u m=30
+M10 dn dp 0 0 nmos1 w=1u l=0.45u m=12
+M11 dp dn 0 0 nmos1 w=1u l=0.45u m=12
+M12 dn nclk 0 0 nmos1 w=1u l=0.45u m=6
+M13 dp nclk 0 0 nmos1 w=1u l=0.45u m=6
+M8 dp an net3 vdd pmos1 w=3u l=0.45u m=30
+M9 dn ap net2 vdd pmos1 w=3u l=0.45u m=30
+Mip nclk clkc vdd vdd pmos1 w=3u l=0.45u m=1
+Min nclk clkc 0 0 nmos1 w=1u l=0.45u m=1
+Cap ap 0 4f
+Can an 0 4f
+Cn1 net1 0 6f
+Cn2 net2 0 2f
+Cn3 net3 0 2f
+Cdp dp 0 4f
+Cdn dn 0 4f
+Cnc nclk 0 2f
+Bmx mx 0 V = max(v(dp),v(dn))
+Bdiff diff 0 V = abs(v(dp)-v(dn))
+.ic v(ap)=1.5 v(an)=1.5 v(net1)=0.4009999632835388 v(net2)=1.5 v(net3)=1.5 v(dp)=0 v(dn)=0 v(nclk)=1.5
+.options method=gear maxord=1 trtol=1e7 reltol=1e-10 vntol=1e-13 abstol=1e-16 gmin=1e-15 itl4=200
+.tran 0.1p 15.5p 0 0.1p uic
+.meas tran tck when v(clkc)=0.75 rise=1
+.meas tran tfirst when v(mx)=0.75 rise=1
+.meas tran tres when v(diff)=0.75 rise=1
+.meas tran dpmax max v(dp)
+.meas tran dnmax max v(dn)
+.meas tran dpend find v(dp) at=15.5p
+.meas tran dnend find v(dn) at=15.5p
+.end

specs/analog/decks/sar_cmp_p05.cir

@@ -0,0 +1,64 @@
+SAR ADC dynamic comparator, p05: VDP - VDN = +0.5 mV, backward Euler on a fixed 0.1 ps grid, MOSFET LEVEL=1
+* specs/analog/decks/sar_cmp_p05.cir -- test data for specs/analog/sar_comparator.t27 (#10583). A plain netlist, no .control block.
+* Circuit: the dynamic_comparator subcircuit of the uberWAVE golden SAR deck (wp2-parser/golden/top.spice; GPL-2.0, read at
+* run time and never vendored) -- thirteen transistors, M1..M13 here for its XM1..XM13, with the W, L and m of that deck --
+* plus the inverter x1 that makes n_clkc from clkc (Mip, Min). Square law: MOSFET LEVEL=1 (Shichman-Hodges), KP 300 uA/V^2 (n)
+* and 100 uA/V^2 (p), VTO +-0.35 V, LAMBDA 0, GAMMA 0. beta = KP W / L = 666.7 uA/V^2 per unit m for both types (n: 1u / 0.45u,
+* p: 3u / 0.45u). The model sets no TOX, CGSO, CGDO or CJ, so the only capacitance is the explicit one: 4 fF on ap, an, dp, dn;
+* 6 fF on net1; 2 fF on net2, net3 and nclk. This is the SQUARE LAW, not PSP103.
+* Inputs: VDD 1.5 V, common mode 0.75 V, VDP and VDN as written below (units of 2^-24 V: 4194 per side, so the difference
+* is 8388 units = 0.49996 mV). The clock is a B source (it declares no breakpoint): 0 for the first 10 grid points, then a
+* ramp of 16 steps of 1.5/16 V, then 1.5 V. nint(time/dt) picks the grid index whatever the offset of ngspice's opening ramp.
+* The circuit rests until the clock moves: ap = an = net2 = net3 = nclk = 1.5 V, dp = dn = 0, net1 = max(VDP, VDN) - 0.35 V
+* (the higher input device sits at threshold, so no current flows; 0.35 V is taken as 5872026 units of 2^-24 V, the spec's own
+* rounding of it, so that the deck and the spec start from the same word).
+* Fixed step: gear with maxord 1 is backward Euler, trtol 1e7 stops the truncation test from shrinking a step; reltol, vntol,
+* abstol and gmin are tightened so Newton ends far below the 1e-6 V the spec compares. Step j of the run (j = 1..140) ends at the
+* grid point with nint(time/dt) = j + 10. Probe sources: mx = max(dp, dn), diff = |dp - dn| (a B source senses without loading).
+* Measured (printed by the .meas lines): tck, the clock through 0.75 V; tfirst, the first output through 0.75 V; tres, |dp - dn|
+* through 0.75 V; dpmax and dnmax, the highest value each output reaches (the loser's peak); dpend and dnend, the outputs at the
+* last point. Decision time = tfirst - tck; resolution time = tres - tck.
+* Run: ngspice -b sar_cmp_p05.cir   (do not add -r: ngspice refuses .meas together with a raw file)
+.model nmos1 nmos level=1 vto=0.35 kp=300u lambda=0 gamma=0
+.model pmos1 pmos level=1 vto=-0.35 kp=100u lambda=0
+Vdd vdd 0 1.5
+Vdp vdp 0 0.750249981880188
+Vdn vdn 0 0.749750018119812
+Bclk clkc 0 V = 1.5*min(max(nint(time/1e-13)-10,0),16)/16
+M1 ap clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M2 an clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M3 ap vdn net1 0 nmos1 w=1u l=0.45u m=36
+M4 an vdp net1 0 nmos1 w=1u l=0.45u m=36
+M5 net1 clkc 0 0 nmos1 w=1u l=0.45u m=18
+M6 net2 dp vdd vdd pmos1 w=3u l=0.45u m=30
+M7 net3 dn vdd vdd pmos1 w=3u l=0.45u m=30
+M10 dn dp 0 0 nmos1 w=1u l=0.45u m=12
+M11 dp dn 0 0 nmos1 w=1u l=0.45u m=12
+M12 dn nclk 0 0 nmos1 w=1u l=0.45u m=6
+M13 dp nclk 0 0 nmos1 w=1u l=0.45u m=6
+M8 dp an net3 vdd pmos1 w=3u l=0.45u m=30
+M9 dn ap net2 vdd pmos1 w=3u l=0.45u m=30
+Mip nclk clkc vdd vdd pmos1 w=3u l=0.45u m=1
+Min nclk clkc 0 0 nmos1 w=1u l=0.45u m=1
+Cap ap 0 4f
+Can an 0 4f
+Cn1 net1 0 6f
+Cn2 net2 0 2f
+Cn3 net3 0 2f
+Cdp dp 0 4f
+Cdn dn 0 4f
+Cnc nclk 0 2f
+Bmx mx 0 V = max(v(dp),v(dn))
+Bdiff diff 0 V = abs(v(dp)-v(dn))
+.ic v(ap)=1.5 v(an)=1.5 v(net1)=0.4002499580383301 v(net2)=1.5 v(net3)=1.5 v(dp)=0 v(dn)=0 v(nclk)=1.5
+.options method=gear maxord=1 trtol=1e7 reltol=1e-10 vntol=1e-13 abstol=1e-16 gmin=1e-15 itl4=200
+.tran 0.1p 15.5p 0 0.1p uic
+.meas tran tck when v(clkc)=0.75 rise=1
+.meas tran tfirst when v(mx)=0.75 rise=1
+.meas tran tres when v(diff)=0.75 rise=1
+.meas tran dpmax max v(dp)
+.meas tran dnmax max v(dn)
+.meas tran dpend find v(dp) at=15.5p
+.meas tran dnend find v(dn) at=15.5p
+.print tran v(ap) v(an) v(net1) v(net2) v(net3) v(dp) v(dn) v(nclk)
+.end

specs/analog/decks/sar_cmp_p2.cir

@@ -0,0 +1,64 @@
+SAR ADC dynamic comparator, p2: VDP - VDN = +2 mV, backward Euler on a fixed 0.1 ps grid, MOSFET LEVEL=1
+* specs/analog/decks/sar_cmp_p2.cir -- test data for specs/analog/sar_comparator.t27 (#10583). A plain netlist, no .control block.
+* Circuit: the dynamic_comparator subcircuit of the uberWAVE golden SAR deck (wp2-parser/golden/top.spice; GPL-2.0, read at
+* run time and never vendored) -- thirteen transistors, M1..M13 here for its XM1..XM13, with the W, L and m of that deck --
+* plus the inverter x1 that makes n_clkc from clkc (Mip, Min). Square law: MOSFET LEVEL=1 (Shichman-Hodges), KP 300 uA/V^2 (n)
+* and 100 uA/V^2 (p), VTO +-0.35 V, LAMBDA 0, GAMMA 0. beta = KP W / L = 666.7 uA/V^2 per unit m for both types (n: 1u / 0.45u,
+* p: 3u / 0.45u). The model sets no TOX, CGSO, CGDO or CJ, so the only capacitance is the explicit one: 4 fF on ap, an, dp, dn;
+* 6 fF on net1; 2 fF on net2, net3 and nclk. This is the SQUARE LAW, not PSP103.
+* Inputs: VDD 1.5 V, common mode 0.75 V, VDP and VDN as written below (units of 2^-24 V: 16777 per side, so the difference
+* is 33554 units = 1.99997 mV). The clock is a B source (it declares no breakpoint): 0 for the first 10 grid points, then a
+* ramp of 16 steps of 1.5/16 V, then 1.5 V. nint(time/dt) picks the grid index whatever the offset of ngspice's opening ramp.
+* The circuit rests until the clock moves: ap = an = net2 = net3 = nclk = 1.5 V, dp = dn = 0, net1 = max(VDP, VDN) - 0.35 V
+* (the higher input device sits at threshold, so no current flows; 0.35 V is taken as 5872026 units of 2^-24 V, the spec's own
+* rounding of it, so that the deck and the spec start from the same word).
+* Fixed step: gear with maxord 1 is backward Euler, trtol 1e7 stops the truncation test from shrinking a step; reltol, vntol,
+* abstol and gmin are tightened so Newton ends far below the 1e-6 V the spec compares. Step j of the run (j = 1..140) ends at the
+* grid point with nint(time/dt) = j + 10. Probe sources: mx = max(dp, dn), diff = |dp - dn| (a B source senses without loading).
+* Measured (printed by the .meas lines): tck, the clock through 0.75 V; tfirst, the first output through 0.75 V; tres, |dp - dn|
+* through 0.75 V; dpmax and dnmax, the highest value each output reaches (the loser's peak); dpend and dnend, the outputs at the
+* last point. Decision time = tfirst - tck; resolution time = tres - tck.
+* Run: ngspice -b sar_cmp_p2.cir   (do not add -r: ngspice refuses .meas together with a raw file)
+.model nmos1 nmos level=1 vto=0.35 kp=300u lambda=0 gamma=0
+.model pmos1 pmos level=1 vto=-0.35 kp=100u lambda=0
+Vdd vdd 0 1.5
+Vdp vdp 0 0.7509999871253967
+Vdn vdn 0 0.7490000128746033
+Bclk clkc 0 V = 1.5*min(max(nint(time/1e-13)-10,0),16)/16
+M1 ap clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M2 an clkc vdd vdd pmos1 w=3u l=0.45u m=9
+M3 ap vdn net1 0 nmos1 w=1u l=0.45u m=36
+M4 an vdp net1 0 nmos1 w=1u l=0.45u m=36
+M5 net1 clkc 0 0 nmos1 w=1u l=0.45u m=18
+M6 net2 dp vdd vdd pmos1 w=3u l=0.45u m=30
+M7 net3 dn vdd vdd pmos1 w=3u l=0.45u m=30
+M10 dn dp 0 0 nmos1 w=1u l=0.45u m=12
+M11 dp dn 0 0 nmos1 w=1u l=0.45u m=12
+M12 dn nclk 0 0 nmos1 w=1u l=0.45u m=6
+M13 dp nclk 0 0 nmos1 w=1u l=0.45u m=6
+M8 dp an net3 vdd pmos1 w=3u l=0.45u m=30
+M9 dn ap net2 vdd pmos1 w=3u l=0.45u m=30
+Mip nclk clkc vdd vdd pmos1 w=3u l=0.45u m=1
+Min nclk clkc 0 0 nmos1 w=1u l=0.45u m=1
+Cap ap 0 4f
+Can an 0 4f
+Cn1 net1 0 6f
+Cn2 net2 0 2f
+Cn3 net3 0 2f
+Cdp dp 0 4f
+Cdn dn 0 4f
+Cnc nclk 0 2f
+Bmx mx 0 V = max(v(dp),v(dn))
+Bdiff diff 0 V = abs(v(dp)-v(dn))
+.ic v(ap)=1.5 v(an)=1.5 v(net1)=0.4009999632835388 v(net2)=1.5 v(net3)=1.5 v(dp)=0 v(dn)=0 v(nclk)=1.5
+.options method=gear maxord=1 trtol=1e7 reltol=1e-10 vntol=1e-13 abstol=1e-16 gmin=1e-15 itl4=200
+.tran 0.1p 15.5p 0 0.1p uic
+.meas tran tck when v(clkc)=0.75 rise=1
+.meas tran tfirst when v(mx)=0.75 rise=1
+.meas tran tres when v(diff)=0.75 rise=1
+.meas tran dpmax max v(dp)
+.meas tran dnmax max v(dn)
+.meas tran dpend find v(dp) at=15.5p
+.meas tran dnend find v(dn) at=15.5p
+.print tran v(ap) v(an) v(net1) v(net2) v(net3) v(dp) v(dn) v(nclk)
+.end