gHashTag · Oct 19, 2026 · Oct 19, 2026 · Oct 19, 2026 · Oct 19, 2026
@@ -1,37 +1,41 @@
 {
-  "built_by": "t27c-bootstrap@0.5.2+ea35d9b72",
+  "built_by": "t27c-bootstrap@0.5.2+42a4860c4",
   "closure": [
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       "spec_hash": "sha256:3ddef7be183aba583ed285334ee389b48a65b41335e98914514235db7c4e5d62"
     },
     {
       "spec": "specs/analog/mos_psp103_data.t27",
-      "spec_hash": "sha256:be100dec66ee80de6cf520f79038e7668bc1171102db1fefe6a4c74559d029de"
+      "spec_hash": "sha256:c3d11a64e1fb2eddb7724acb75bcf7c242551a683a7d265a7cdd0d208c8d4d7b"
     },
     {
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       "spec_hash": "sha256:16d28f10fa8663926dddb4bcced981cdc4cd8f38a6b748e4b7688f2e56bbab6c"
+    },
+    {
+      "spec": "specs/analog/sar_comparator.t27",
+      "spec_hash": "sha256:db347ab1845e5323822b3ab77ba3d43b9923d105cc717e7224ad54c7328d23a7"
     }
   ],
   "config": "gen=c,rust,verilog,zig;tests=zig",
-  "gen_hash_c": "sha256:a5aeefd7abe3aee47919f32153161040121a31fba6fbfc6e3517fe1796191a8a",
-  "gen_hash_rust": "sha256:0660934f0f63c77f8b204796f1c8e3f5db1d35603797d7ddf912f66a2039d4a2",
-  "gen_hash_verilog": "sha256:06e55f455e71a7b274d2b8e766028a05ec666c1814b4ed64f8e7ad381706e61e",
-  "gen_hash_zig": "sha256:460548424dd136ec773917ebc3dd3c6ad31561cbde36cabf8a69266c2e8c7b6c",
+  "gen_hash_c": "sha256:69fd7266d0521ec8d562ada8c030435202a0d2224d474dc5c5a9fc491000df19",
+  "gen_hash_rust": "sha256:745bf1988b0cb964b0196d6ea22d468bf839236585dd64e82d92ea70630e9e7b",
+  "gen_hash_verilog": "sha256:83361d5ce963f001d2afb09ca4d82d7dbf14caa8beecb7c6f5e3f67ac7cb8bc5",
+  "gen_hash_zig": "sha256:1b08ed9b9f43e9567fbfd414e308b40c86570febae56f72d7161f3d3b15d8704",
   "module": "AnalogMosPsp103",
   "ring": 12,
   "seal_schema": 2,
-  "sealed_at": "2026-10-19T05:34:01Z",
+  "sealed_at": "2026-10-19T18:09:16Z",
   "sealed_by": "t27c-bootstrap@0.5.2",
-  "spec_hash": "sha256:811617266484683542dd1723db77687ad7fdf7f5a665953f5e6a920a7bdf0118",
+  "spec_hash": "sha256:d178addc19558d26f503d3f5493e9815fa534209fb14169244b0b439c431b2a9",
   "spec_path": "specs/analog/mos_psp103.t27",
   "tests": {
     "failed": 0,
     "failing": [],
     "forced": false,
-    "passed": 17,
-    "total": 17,
+    "passed": 25,
+    "total": 25,
     "vacuous": 0
   },
   "toolchain": {

@@ -1,29 +1,29 @@
 {
-  "built_by": "t27c-bootstrap@0.5.2+0fba674ef",
+  "built_by": "t27c-bootstrap@0.5.2+42a4860c4",
   "closure": [
     {
       "spec": "specs/analog/linear.t27",
       "spec_hash": "sha256:3ddef7be183aba583ed285334ee389b48a65b41335e98914514235db7c4e5d62"
     }
   ],
   "config": "gen=c,rust,verilog,zig;tests=zig",
-  "gen_hash_c": "sha256:c1bef3a23c202f04a424fa9647be515f0a73b0570f564b2034dc0f7ced6a3286",
-  "gen_hash_rust": "sha256:e79aeca5c088b28ba70f75c7db22b193450cb7436f9dc188b24149457d09797d",
-  "gen_hash_verilog": "sha256:913b5632ebb861ca2f1753a2c062ad6177792cdae769c0c41912b2dc3afe29a1",
-  "gen_hash_zig": "sha256:37dc8408fe41cf9c5774624a1c0de61ce288b322eb5d777d841a10bd653768a4",
+  "gen_hash_c": "sha256:9e8e5b97faba8e2120066681472986c2b70b5207fb9f26c57a38f527f531c576",
+  "gen_hash_rust": "sha256:715acf0a48c1f1ba88df704ffc3a48ab3190d65a4282270bb2976a57c1450954",
+  "gen_hash_verilog": "sha256:f6f05bdafbac3e28a73cc54412ed776429b0ef7ce1c08219fa7dfabc2c98ebdd",
+  "gen_hash_zig": "sha256:9a77f32c1a9ee683b89349a0d2e87d166a1a3a8154663dfdb79053c0d11895eb",
   "module": "AnalogMosPsp103Data",
   "ring": 12,
   "seal_schema": 2,
-  "sealed_at": "2026-10-19T16:29:24Z",
+  "sealed_at": "2026-10-19T18:09:24Z",
   "sealed_by": "t27c-bootstrap@0.5.2",
-  "spec_hash": "sha256:3936594d2ab220f06b2d636182689811b696e044fc3ce6850ea2604ac74f3ea3",
+  "spec_hash": "sha256:c3d11a64e1fb2eddb7724acb75bcf7c242551a683a7d265a7cdd0d208c8d4d7b",
   "spec_path": "specs/analog/mos_psp103_data.t27",
   "tests": {
     "failed": 0,
     "failing": [],
     "forced": false,
-    "passed": 8,
-    "total": 8,
+    "passed": 9,
+    "total": 9,
     "vacuous": 0
   },
   "toolchain": {

@@ -0,0 +1,46 @@
+IHP SG13G2 MOS gate node loaded by a MOS drain, 25 fF, backward Euler on a fixed 5 ps grid, corner mos_tt
+* specs/analog/decks/psp103_gate_node.cir -- reference data for specs/analog/mos_psp103.t27 (M3c-3, #10882, epic #10486). A netlist plus
+* a .control block that prints the waveform of one node.
+* The circuit has an internal GATE NODE g: the gate of one sg13_lv_nmos (w=1.0u l=0.45u, source and bulk at 0 V, drain at the 1.5 V rail, so its
+* Vds is 1.5 V whatever g does: its gate charge is the NMOS gate-charge table read along Vds = 1.5 V), loaded by the DRAIN of one sg13_lv_pmos
+* (w=3.0u l=0.45u, source and bulk at the 1.5 V rail, gate `in`), by a 25 fF capacitor to ground (the node's own capacitance) and by a 10 kohm
+* resistor to a 0.75 V bias, which holds the node at 0.75 V at rest. `in` is at 1.5 V (the PMOS off), then 0 V for 8 steps, then 1.5 V again: the
+* falling edge of `in` takes charge off the node through the PMOS' gate-drain coupling (a jump of charge: the node moves by 0.15 V in the first step
+* before the PMOS current can act) and the PMOS then charges the node; the rising edge takes the coupling back, and the node relaxes to its bias through
+* the resistor. The node stays between 0.59 V and 1.08 V, inside the range of the tables, which the rails of an inverter's output would not: an
+* inverter's output kicked by its own gate edge goes through 0 V and 1.5 V (32 mV and 38 mV beyond them at 100 fF), where the tables end. g holds, besides
+* the capacitor and the resistor, the drain charge of the PMOS and the gate charge of the loading NMOS: the first circuit in which the gate charge
+* tables are read. The tables' unit is dt / C = 200 V/A, as in the 500 fF run: dt = 5 ps on C = 25 fF, so the same current tables apply and the
+* charge tables (Q / 500 fF) are scaled by 500 fF / 25 fF = 20.
+* Paths are NOT in this file: ngspice reads IHP_PDK and IHP_OSDI from the environment (see psp103_tab_tt.cir).
+* Run: IHP_PDK=<checkout> IHP_OSDI=<osdi dir> ngspice -b psp103_gate_node.cir    (ngspice-47)
+* Grid: as psp103_inv_be_500f.cir with dt = 5 ps: tstep = 0.78125 dt makes the opening ramp end exactly at dt, so every internal point from then
+* on is a multiple of dt. The input is a B source of nint(time / dt): 1.5 V up to index 1, 0 V from index 2 (10 ps) to index 9, 1.5 V from index 10.
+* Step k of the spec ends at (k + 2) dt; step 0 starts at t = dt = 5 ps and step 8 at 9 dt = 45 ps.
+* What it prints: between "BEGIN tran_be" and "END tran_be", 401 rows "<index> TAB <time> TAB <y>", y the node g in units of 2^-24 V at t = 5 ps,
+* 10 ps, ... 2.005 ns (row 0 is the circuit at rest before step 0, row k + 1 the node after step k).
+.lib $IHP_PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_tt
+VB vb 0 0.75
+VDD vdd 0 1.5
+Bin in 0 V = 1.5*(1-min(max(nint(time/5e-12)-1,0),1)+min(max(nint(time/5e-12)-9,0),1))
+XP g in vdd vdd sg13_lv_pmos w=3.0u l=0.45u ng=1 m=1
+XM1 vdd g 0 0 sg13_lv_nmos w=1.0u l=0.45u ng=1 m=1
+CG g 0 25f
+RB g vb 10k
+.temp 27
+.options method=gear maxord=1 trtol=1e7 reltol=1e-6 vntol=1e-9 abstol=1e-12 itl4=200
+.tran 3.90625p 2.02n 0 5p
+.control
+pre_osdi $IHP_OSDI/psp103.osdi
+pre_osdi $IHP_OSDI/psp103_nqs.osdi
+run
+set numdgt=10
+set noprintscale
+let y = nint(v(g) * 16777216)
+let ts = time[8,408]
+let ys = y[8,408]
+echo BEGIN tran_be
+print ts ys
+echo END tran_be
+.endc
+.end
@@ -0,0 +1,41 @@
+IHP SG13G2 inverter, 500 fF, backward Euler on a fixed 100 ps grid, corner mos_ff
+* specs/analog/decks/psp103_inv_be_500f_ff.cir -- reference data for specs/analog/mos_psp103.t27 (M3b, #10516, epic #10486). A netlist plus
+* a .control block that prints two numbers. M3c-3 (#10882): the same deck for corner mos_ff, the reference of the ff charge-table run (psp103_inv_be_500f.cir is mos_tt; _ss, _fs and _sf are the other three).
+* The circuit and the run of psp103_inv_be.cir with the load at 500 fF and dt = 100 ps (dt / C = 200 V/A again, so the table model runs the
+* same 400 steps, bit for bit; only the circuit is 20 times faster). The device capacitances of PSP103 (gate-drain overlap and channel,
+* drain junctions: a few fF to some ten fF at W = 1 um and 3 um), which the table model does not have, are now a few percent of the load.
+* Paths are NOT in this file: ngspice reads IHP_PDK and IHP_OSDI from the environment (see psp103_tab_tt.cir).
+* Run: IHP_PDK=<checkout> IHP_OSDI=<osdi dir> ngspice -b psp103_inv_be_500f_ff.cir    (ngspice-47)
+* Grid: tstep = 0.78125 dt makes the opening ramp end exactly at dt = 100 ps, so every internal point from then on is a multiple of dt. The
+* input is a B source of nint(time / dt): Vdd up to index 1, 0 V from index 2 (150 ps) to index 201, Vdd from index 202. Step k of the spec ends
+* at (k + 2) dt; step 0 starts at t = dt = 100 ps and step 200 at 201 dt = 20.1 ns.
+* What it prints (ngspice .meas, 6 digits, in s): tplh and tphl, the times at which the output crosses 0.75 V rising (after step 0's edge) and
+* falling (after step 200's edge); the delays are these minus 100 ps and minus 20.1 ns.
+* M3c adds the waveform: between "BEGIN tran_be" and "END tran_be", 401 rows "<index> TAB <time> TAB <y>", y the output in units of 2^-24 V at
+* t = 100 ps, 200 ps, ... 40.1 ns (row 0 is the circuit at rest before step 0, row k + 1 the output after step k), as psp103_inv_be.cir does at 2 ns.
+.lib $IHP_PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ff
+VDD vdd 0 1.5
+Bin in 0 V = 1.5*(1-min(max(nint(time/1e-10)-1,0),1)+min(max(nint(time/1e-10)-201,0),1))
+XIP out in vdd vdd sg13_lv_pmos w=3.0u l=0.45u ng=1 m=1
+XIN out in 0 0 sg13_lv_nmos w=1.0u l=0.45u ng=1 m=1
+CL out 0 500f
+.temp 27
+.options method=gear maxord=1 trtol=1e7 reltol=1e-6 vntol=1e-9 abstol=1e-12 itl4=200
+.tran 78.125p 40.4n 0 100p
+.meas tran tplh when v(out)=0.75 rise=1
+.meas tran tphl when v(out)=0.75 fall=1
+.control
+pre_osdi $IHP_OSDI/psp103.osdi
+pre_osdi $IHP_OSDI/psp103_nqs.osdi
+run
+* M3c (#10777): after the run, which prints the two .meas numbers as before, the waveform is printed the way psp103_inv_be.cir prints it.
+set numdgt=10
+set noprintscale
+let y = nint(v(out) * 16777216)
+let ts = time[8,408]
+let ys = y[8,408]
+echo BEGIN tran_be
+print ts ys
+echo END tran_be
+.endc
+.end
@@ -0,0 +1,41 @@
+IHP SG13G2 inverter, 500 fF, backward Euler on a fixed 100 ps grid, corner mos_fs
+* specs/analog/decks/psp103_inv_be_500f_fs.cir -- reference data for specs/analog/mos_psp103.t27 (M3b, #10516, epic #10486). A netlist plus
+* a .control block that prints two numbers. M3c-3 (#10882): the same deck for corner mos_fs, the reference of the fs charge-table run (psp103_inv_be_500f.cir is mos_tt; _ss, _ff and _sf are the other three).
+* The circuit and the run of psp103_inv_be.cir with the load at 500 fF and dt = 100 ps (dt / C = 200 V/A again, so the table model runs the
+* same 400 steps, bit for bit; only the circuit is 20 times faster). The device capacitances of PSP103 (gate-drain overlap and channel,
+* drain junctions: a few fF to some ten fF at W = 1 um and 3 um), which the table model does not have, are now a few percent of the load.
+* Paths are NOT in this file: ngspice reads IHP_PDK and IHP_OSDI from the environment (see psp103_tab_tt.cir).
+* Run: IHP_PDK=<checkout> IHP_OSDI=<osdi dir> ngspice -b psp103_inv_be_500f_fs.cir    (ngspice-47)
+* Grid: tstep = 0.78125 dt makes the opening ramp end exactly at dt = 100 ps, so every internal point from then on is a multiple of dt. The
+* input is a B source of nint(time / dt): Vdd up to index 1, 0 V from index 2 (150 ps) to index 201, Vdd from index 202. Step k of the spec ends
+* at (k + 2) dt; step 0 starts at t = dt = 100 ps and step 200 at 201 dt = 20.1 ns.
+* What it prints (ngspice .meas, 6 digits, in s): tplh and tphl, the times at which the output crosses 0.75 V rising (after step 0's edge) and
+* falling (after step 200's edge); the delays are these minus 100 ps and minus 20.1 ns.
+* M3c adds the waveform: between "BEGIN tran_be" and "END tran_be", 401 rows "<index> TAB <time> TAB <y>", y the output in units of 2^-24 V at
+* t = 100 ps, 200 ps, ... 40.1 ns (row 0 is the circuit at rest before step 0, row k + 1 the output after step k), as psp103_inv_be.cir does at 2 ns.
+.lib $IHP_PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_fs
+VDD vdd 0 1.5
+Bin in 0 V = 1.5*(1-min(max(nint(time/1e-10)-1,0),1)+min(max(nint(time/1e-10)-201,0),1))
+XIP out in vdd vdd sg13_lv_pmos w=3.0u l=0.45u ng=1 m=1
+XIN out in 0 0 sg13_lv_nmos w=1.0u l=0.45u ng=1 m=1
+CL out 0 500f
+.temp 27
+.options method=gear maxord=1 trtol=1e7 reltol=1e-6 vntol=1e-9 abstol=1e-12 itl4=200
+.tran 78.125p 40.4n 0 100p
+.meas tran tplh when v(out)=0.75 rise=1
+.meas tran tphl when v(out)=0.75 fall=1
+.control
+pre_osdi $IHP_OSDI/psp103.osdi
+pre_osdi $IHP_OSDI/psp103_nqs.osdi
+run
+* M3c (#10777): after the run, which prints the two .meas numbers as before, the waveform is printed the way psp103_inv_be.cir prints it.
+set numdgt=10
+set noprintscale
+let y = nint(v(out) * 16777216)
+let ts = time[8,408]
+let ys = y[8,408]
+echo BEGIN tran_be
+print ts ys
+echo END tran_be
+.endc
+.end
@@ -0,0 +1,41 @@
+IHP SG13G2 inverter, 500 fF, backward Euler on a fixed 100 ps grid, corner mos_sf
+* specs/analog/decks/psp103_inv_be_500f_sf.cir -- reference data for specs/analog/mos_psp103.t27 (M3b, #10516, epic #10486). A netlist plus
+* a .control block that prints two numbers. M3c-3 (#10882): the same deck for corner mos_sf, the reference of the sf charge-table run (psp103_inv_be_500f.cir is mos_tt; _ss, _ff and _fs are the other three).
+* The circuit and the run of psp103_inv_be.cir with the load at 500 fF and dt = 100 ps (dt / C = 200 V/A again, so the table model runs the
+* same 400 steps, bit for bit; only the circuit is 20 times faster). The device capacitances of PSP103 (gate-drain overlap and channel,
+* drain junctions: a few fF to some ten fF at W = 1 um and 3 um), which the table model does not have, are now a few percent of the load.
+* Paths are NOT in this file: ngspice reads IHP_PDK and IHP_OSDI from the environment (see psp103_tab_tt.cir).
+* Run: IHP_PDK=<checkout> IHP_OSDI=<osdi dir> ngspice -b psp103_inv_be_500f_sf.cir    (ngspice-47)
+* Grid: tstep = 0.78125 dt makes the opening ramp end exactly at dt = 100 ps, so every internal point from then on is a multiple of dt. The
+* input is a B source of nint(time / dt): Vdd up to index 1, 0 V from index 2 (150 ps) to index 201, Vdd from index 202. Step k of the spec ends
+* at (k + 2) dt; step 0 starts at t = dt = 100 ps and step 200 at 201 dt = 20.1 ns.
+* What it prints (ngspice .meas, 6 digits, in s): tplh and tphl, the times at which the output crosses 0.75 V rising (after step 0's edge) and
+* falling (after step 200's edge); the delays are these minus 100 ps and minus 20.1 ns.
+* M3c adds the waveform: between "BEGIN tran_be" and "END tran_be", 401 rows "<index> TAB <time> TAB <y>", y the output in units of 2^-24 V at
+* t = 100 ps, 200 ps, ... 40.1 ns (row 0 is the circuit at rest before step 0, row k + 1 the output after step k), as psp103_inv_be.cir does at 2 ns.
+.lib $IHP_PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_sf
+VDD vdd 0 1.5
+Bin in 0 V = 1.5*(1-min(max(nint(time/1e-10)-1,0),1)+min(max(nint(time/1e-10)-201,0),1))
+XIP out in vdd vdd sg13_lv_pmos w=3.0u l=0.45u ng=1 m=1
+XIN out in 0 0 sg13_lv_nmos w=1.0u l=0.45u ng=1 m=1
+CL out 0 500f
+.temp 27
+.options method=gear maxord=1 trtol=1e7 reltol=1e-6 vntol=1e-9 abstol=1e-12 itl4=200
+.tran 78.125p 40.4n 0 100p
+.meas tran tplh when v(out)=0.75 rise=1
+.meas tran tphl when v(out)=0.75 fall=1
+.control
+pre_osdi $IHP_OSDI/psp103.osdi
+pre_osdi $IHP_OSDI/psp103_nqs.osdi
+run
+* M3c (#10777): after the run, which prints the two .meas numbers as before, the waveform is printed the way psp103_inv_be.cir prints it.
+set numdgt=10
+set noprintscale
+let y = nint(v(out) * 16777216)
+let ts = time[8,408]
+let ys = y[8,408]
+echo BEGIN tran_be
+print ts ys
+echo END tran_be
+.endc
+.end
@@ -0,0 +1,41 @@
+IHP SG13G2 inverter, 500 fF, backward Euler on a fixed 100 ps grid, corner mos_ss
+* specs/analog/decks/psp103_inv_be_500f_ss.cir -- reference data for specs/analog/mos_psp103.t27 (M3b, #10516, epic #10486). A netlist plus
+* a .control block that prints two numbers. M3c-3 (#10882): the same deck for corner mos_ss, the reference of the ss charge-table run (psp103_inv_be_500f.cir is mos_tt; _ff, _fs and _sf are the other three).
+* The circuit and the run of psp103_inv_be.cir with the load at 500 fF and dt = 100 ps (dt / C = 200 V/A again, so the table model runs the
+* same 400 steps, bit for bit; only the circuit is 20 times faster). The device capacitances of PSP103 (gate-drain overlap and channel,
+* drain junctions: a few fF to some ten fF at W = 1 um and 3 um), which the table model does not have, are now a few percent of the load.
+* Paths are NOT in this file: ngspice reads IHP_PDK and IHP_OSDI from the environment (see psp103_tab_tt.cir).
+* Run: IHP_PDK=<checkout> IHP_OSDI=<osdi dir> ngspice -b psp103_inv_be_500f_ss.cir    (ngspice-47)
+* Grid: tstep = 0.78125 dt makes the opening ramp end exactly at dt = 100 ps, so every internal point from then on is a multiple of dt. The
+* input is a B source of nint(time / dt): Vdd up to index 1, 0 V from index 2 (150 ps) to index 201, Vdd from index 202. Step k of the spec ends
+* at (k + 2) dt; step 0 starts at t = dt = 100 ps and step 200 at 201 dt = 20.1 ns.
+* What it prints (ngspice .meas, 6 digits, in s): tplh and tphl, the times at which the output crosses 0.75 V rising (after step 0's edge) and
+* falling (after step 200's edge); the delays are these minus 100 ps and minus 20.1 ns.
+* M3c adds the waveform: between "BEGIN tran_be" and "END tran_be", 401 rows "<index> TAB <time> TAB <y>", y the output in units of 2^-24 V at
+* t = 100 ps, 200 ps, ... 40.1 ns (row 0 is the circuit at rest before step 0, row k + 1 the output after step k), as psp103_inv_be.cir does at 2 ns.
+.lib $IHP_PDK/ihp-sg13g2/libs.tech/ngspice/models/cornerMOSlv.lib mos_ss
+VDD vdd 0 1.5
+Bin in 0 V = 1.5*(1-min(max(nint(time/1e-10)-1,0),1)+min(max(nint(time/1e-10)-201,0),1))
+XIP out in vdd vdd sg13_lv_pmos w=3.0u l=0.45u ng=1 m=1
+XIN out in 0 0 sg13_lv_nmos w=1.0u l=0.45u ng=1 m=1
+CL out 0 500f
+.temp 27
+.options method=gear maxord=1 trtol=1e7 reltol=1e-6 vntol=1e-9 abstol=1e-12 itl4=200
+.tran 78.125p 40.4n 0 100p
+.meas tran tplh when v(out)=0.75 rise=1
+.meas tran tphl when v(out)=0.75 fall=1
+.control
+pre_osdi $IHP_OSDI/psp103.osdi
+pre_osdi $IHP_OSDI/psp103_nqs.osdi
+run
+* M3c (#10777): after the run, which prints the two .meas numbers as before, the waveform is printed the way psp103_inv_be.cir prints it.
+set numdgt=10
+set noprintscale
+let y = nint(v(out) * 16777216)
+let ts = time[8,408]
+let ys = y[8,408]
+echo BEGIN tran_be
+print ts ys
+echo END tran_be
+.endc
+.end