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analog M5c: the external team's per-block acceptance checks as a .t27 evaluator on our SAR blocks: 3 PASS, 1 FAIL, 9 NOT MODELLED of 13 - #11215

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Oct 20, 2026
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@gHashTag gHashTag commented Oct 20, 2026 •

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Closes #11212

analog M5c: the external team's per-block acceptance checks as a .t27 evaluator on our SAR blocks: 3 PASS, 1 FAIL, 9 NOT MODELLED of 13

Gates run on the merged tree (t27c from master): 6 spec(s) with tests clean and vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's (inherited red).

TEST specs/analog/accept_sar.t27 tests=[13] fail=[0] vacuous=[0]
TEST specs/analog/sar_kick.t27 tests=[10] fail=[0] vacuous=[0]
TEST specs/analog/sar_kick_net.t27 tests=[23] fail=[0] vacuous=[0]
TEST specs/analog/sar_adc.t27 tests=[15] fail=[0] vacuous=[0]
TEST specs/analog/mos_table.t27 tests=[20] fail=[0] vacuous=[0]
TEST specs/analog/mos_psp103.t27 tests=[35] fail=[0] vacuous=[0]
SEAL specs/analog/accept_sar.t27 :: all hashes MATCH
SEAL specs/analog/sar_kick.t27 :: all hashes MATCH
SEAL specs/analog/sar_kick_net.t27 :: all hashes MATCH
SEAL specs/analog/sar_adc.t27 :: all hashes MATCH
SEAL specs/analog/mos_table.t27 :: all hashes MATCH
SEAL specs/analog/mos_psp103.t27 :: all hashes MATCH
TYPES RATCHET: CLEAN
DUPE failing=0 extra-vs-master=[]

Result over the 13 blocks of the external team's report of 2026-10-16: 3 PASS, 1 FAIL, 9 NOT MODELLED. A block is PASS only when every row of the report's check is measured on our model and inside the limit; a row our model does not produce is NOT MODELLED and never counts as a pass. Over the 30 rows of the checks: 16 PASS, 1 FAIL, 13 NOT MODELLED.

block verdict what was measured
inverter NOT MODELLED threshold 0.6892 V against 0.5 to 1.0 V (row PASS); the delays into 20 fF are not modelled
nand, nor NOT MODELLED the truth table passes at logic level; the voltage levels are not modelled
tgate NOT MODELLED Ron and leakage are not modelled
dff NOT MODELLED capture, hold, set, reset pass at logic level; clock-to-Q 546 ps against 1 to 3000 ps (PASS); the voltage levels are not modelled
dynamic_comparator FAIL decision time 5.35 ps against 10 to 10000 ps (5.12 ps on the 27 C tables); sign and end levels pass; the model has no charge, so the FAIL is the model's and it was not tuned
tracking_switch NOT MODELLED tracking error -1.97 uV against +-5 mV (PASS); hold step and droop are not modelled (the square-law model has no charge injection or leakage)
clock_gen PASS slow 16.145 ns, fast 9.822 ns, ratio 1.644 (>= 1.2), stop 5.704 ns (<= 30 ns)
SAR_logic PASS 1, 4, 11 outputs after 1, 4, 11 edges, CK11 first, CK11 to CK1 in 200.126 ns against 199 to 201 ns
DAC_control, DAC_control_top, neg_bottom_plate_logic NOT MODELLED the DAC takes ideal plate levels as input and the latches are not circuits in any spec
integration (11-bit) PASS worst error 18.5 LSB (+-64), smallest step 198 LSB (60 to 250) on the literal -1 to +1 V ramp; a pass of the behavioural converter fitted to the golden deck, not a circuit-level result

Open: the report's "stops 10.7 ns after Valid" is not reproduced (ours 5.70 ns by this lane's definition) and the report's ramp inputs are not known (with the ideal end codes 517 and 1579 the context table gives 512 and 1595 against the report's 510 and 1593). Edit outside the boundary: sar_kick.t27 had a field and a local renamed to hw with no value changed, because the Zig emitter types a local by name across the whole closure (half: f64 there turned (half as u64) in mos_table.t27 into a float conversion); both are tested. Every check has a negative control. t27c test-report: accept_sar 13 tests, sar_kick 10, 0 FAIL, 0 vacuous; t27b test --check exits 0.

🤖 Generated with Claude Code

claude and others added 2 commits October 20, 2026 10:09
… applied to our SAR blocks

specs/analog/accept_sar.t27 holds the limits of the external team's report of
2026-10-16 as named constants, one pure check function per quantity, and one
function per block that measures the quantity on our model (imported with
`use`, no copy) and applies the check. A row is PASS (ours, inside the limit),
FAIL (ours, outside) or NOT MODELLED (the model does not produce the quantity;
never a pass). A block is PASS only when every row is PASS.

Over the 13 blocks: 3 PASS (clock_gen, SAR_logic, integration), 1 FAIL
(dynamic_comparator: decision time 5.35 ps against the 10 ps lower limit, the
no-charge model is 98 times too fast), 9 NOT MODELLED. Over the 30 rows: 16
PASS, 1 FAIL, 13 NOT MODELLED. Every check has a negative control, on the
value and, where a model can be broken to leave the limit, on the model.

docs/analog/accept-sar-2026-10-20.md has the table (block, check, our value,
the report's value, the limit, verdict) and says where a model is square law
or gate level and what that means for the verdict.

specs/analog/sar_kick.t27: the field and local `half` of KickThr renamed `hw`
(no value changed). The Zig emitter types a local by the name of a variable or
field anywhere in the closure, so `half: f64` here made `(half as u64)` in
mos_table.t27's blend1_w, where `half` is a u32, a float conversion, and no
spec could use both specs. To be filed on #5980.

t27c test-report: accept_sar 13 tests, 0 FAIL, 0 vacuous; sar_kick 10 tests,
0 FAIL, 0 vacuous. t27b test --check: exit 0 for accept_sar.

Updates #11212

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
… evaluator on our SAR blocks: 3 PASS, 1 FAIL, 9 NOT MODELLED of 13 (Closes #11212)

Merge of master plus sealing, gates run on the merged tree with t27c from master: tests clean with vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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Generated at: 2026-10-20 03:14:09 UTC

Summary

Status Count
Total Open PRs 50
PRs with Failing Checks 48
PRs with All Checks Green 2
READY 2
FAILING 48
PENDING 0
NO CHECKS YET 0

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=08d882e79f8d != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

@gHashTag
gHashTag merged commit 06a456f into master Oct 20, 2026
34 of 38 checks passed
gHashTag pushed a commit that referenced this pull request Oct 20, 2026
Takes analog M3c-4 and M5c (#11214, #11215), which touch only specs/analog; compiler.rs is unchanged on master.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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analog M5c: the per-block acceptance checks of the external team's report as a .t27 evaluator, applied to our SAR blocks

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