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analog bench: ngspice-47 wall time of the 500 fF tt inverter on the x86 reference host, the real-time ratio derived by a test - #11313

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Oct 20, 2026
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Closes #11291

analog bench: ngspice-47 wall time of the 500 fF tt inverter on the x86 reference host, the real-time ratio derived by a test

Gates run on the merged tree (t27c from master): 1 spec(s) with tests clean and vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's (inherited red).

TEST specs/analog/bench.t27 tests=[14] fail=[0] vacuous=[0]
SEAL specs/analog/bench.t27 :: all hashes MATCH
TYPES RATCHET: CLEAN
DUPE failing=4 extra-vs-master=[]

🤖 Generated with Claude Code

claude and others added 2 commits October 20, 2026 16:39
…eal-time ratio and step time derived in bench.t27, the board's step next to it and not a speed claim (Closes #11291)

The 500 fF PSP103 inverter deck, timed on the remote x86 reference host
(Intel i7-8700 3.2 GHz, one thread, ngspice-47 with psp103.osdi), 2026-10-20:
  4.0004 us: 40013 time points, transient analysis 0.782573 s, elapsed 0.862 s
  40.4 ns:     412 time points, transient analysis 0.00942136 s, elapsed 0.080 s
Derived in tests: real-time ratio 195623 and 233201, time per point 19557 ns
and 22867 ns; start-up share of the elapsed time 88 percent (40 ns) against
9 percent (4 us); both runs print the same tplh/tphl as the recorded ngspice
tt delays.

specs/analog/decks/psp103_inv_be_500f_4us_wall.cir is the committed 500 fF deck
with the .tran stop, set num_threads=1 and rusage all changed (named in its
header) and the print block removed, as it was run.

The board's step (1700 to 1960 clocks at 100 MHz, 17.0 to 19.6 us a step of
100 ps) is stored next to it, with the reasons it is not a speed claim; tests
show may_claim_speedup stays false (no board wall time with readout, no build
time measured), including when the compute-only time is handed to the rule.

t27c test-report specs/analog/bench.t27: 14 pass, 0 FAIL, 0 vacuous.
t27b test specs/analog/bench.t27 --check: 14 passed, no MISMATCH.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
…86 reference host, the real-time ratio derived by a test (Closes #11291)

Merge of master plus sealing, gates run on the merged tree with t27c from master: tests clean with vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's.

Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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Generated at: 2026-10-20 09:42:24 UTC

Summary

Status Count
Total Open PRs 50
PRs with Failing Checks 48
PRs with All Checks Green 2
READY 2
FAILING 48
PENDING 0
NO CHECKS YET 0

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=5aec047d42ec != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

@gHashTag
gHashTag merged commit 24a3abc into master Oct 20, 2026
32 of 35 checks passed
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analog bench: ngspice-47 wall time of the 500 fF tt inverter on the x86 reference host, as a receipt (about 196,000 times slower than real time)

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