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GitGuardian

GitGuardian Security Checks

Schema Validation on: pull_request 2

validate

Damage Negatives on: pull_request 2

Damage negatives (false-positive fixtures)

Documented Commands on: pull_request 2

Documented t27c subcommands exist

FPGA E2E Build on: pull_request 16

fpga-smoke

fpga-lint (read_verilog + hierarchy)

fpga-synthesis

fpga-synthesis-arty

fpga-formal

fpga-conformance

fpga-bitstream

fpga-report

Seal Coverage on: pull_request 3

coverage

L1 TRACEABILITY Check on: pull_request 2

Check L1 TRACEABILITY

L1 Traceability Summary

Untrusted Input Gate on: pull_request

untrusted-input

Duplicate Body Ratchet on: pull_request 1

duplicate-bodies

Own Language on: pull_request 1

own-language

Withdrawn Number Gate on: pull_request 2

withdrawn-live

Gate Topology on: pull_request 1

gate-topology

PHI Loop CI on: pull_request 1

phi-loop-check

Fix Carries Source on: pull_request 1

fix-carries-source

Conflict Markers on: pull_request 2

Conflict markers (no unresolved merges)

PR Dashboard on: pull_request 1

pr-dashboard

Verilog Widths on: pull_request 2

Verilog widths (absurd-width ledger)

Harness scratch directories on: pull_request 2

No test binary shares one scratch directory

cli-tri on: pull_request 3

cli-tri

secret-scan on: pull_request 1

scan

Emit Bit-Exact Gate (CI-02) on: pull_request 2

emit-bitexact

Corpus Ratchet on: pull_request 2

Corpus ratchet (expected-failure ledger)

Spec Parse Ratchet on: pull_request 2

parse-ratchet

Spec Guards on: pull_request 3

spec-guards

Orphaned modules on: pull_request 2

Every source file is reachable from its crate root

Issue Gate on: pull_request_target 2

check-linked-issue

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