spec(port): port specs/port/trios/crates/trios-fpga/src/xdc.t27 (Closes #9567)

[dmitrii-f-t27]

Summary

Port gHashTag/trios:crates/trios-fpga/src/xdc.rs (at 8b229e9489ee) as specs/port/trios/crates/trios-fpga/src/xdc.t27 — Roadmap Stage 6 (goal #4548), target t27c gen-rust. Closes #9567.

The original parses XDC constraint files for the QMTech board: XdcConstraints::from_raw walks the lines skipping blanks and comments and collects the lines that parse as pins; parse_pin_line builds an entry only when the line carries BOTH a PACKAGE_PIN and a port — a bare create_clock line produces no entry — defaulting the IOSTANDARD to LVCMOS33 and marking the entry a clock exactly when the line also contains create_clock; extract_value reads a value after a key with braces and quotes trimmed from its edges; extract_port reads the port behind the [get_ports marker; preprocess_for_nextpnr drops blanks, comments, set_false_path and [current_design] lines and rewrites PULLUP and braced-port lines; minimal_qmtech_xdc carries the minimal board file.

Per the issue's rule ("Port the decision, not the plumbing"), all eight listed functions are ported under their names as tested pure functions over the answers (the string finding and splitting are the caller's plumbing, named in the header), with 10 tests (49 runtime asserts, 0 vacuous, 100% function coverage), against the original's own test expectations:

• parse_pin_line — the entry verdict: pin AND port required (the original's parse_clock_pin test: a bare create_clock line → no entry); IOSTANDARD default; the create_clock marker marks a parsed pin a clock;
• extract_value — the key-and-token gate with the brace/quote edge-trim set ({, }, ");
• extract_port — the [get_ports marker gate;
• preprocess_for_nextpnr — the per-line keep/rewrite plan, with every rewrite token carried as its constant (PULLUP true, [get_ports { , }] and their replacements);
• minimal_qmtech_xdc — the minimal board file's facts: fourteen lines, twelve pins, the clock on E3, the reset on C18, eight leds;
• XdcConstraints_from_raw / XdcConstraints_port_count / XdcConstraints_clock_ports — the composition, tested end to end: the board file's facts → 12 ports, 0 clock entries; an empty source → 0.

Verification (all run live from the worktree root, zig 0.16.0)

• t27c parse: OK. t27c spec-status: IMPLEMENTED. t27c typecheck: 0 errors, 0 warnings.
• t27c coverage: 19/19 tested (100%) — no transports in this port.
• t27c test-report: 10 tests / 10 pass / 0 FAIL / 0 BLOCKED, 0 vacuous passes.
• t27c gen | grep -c 'not yet implemented': 0; gen | wc -l: 207 (> 12).
• grep -cE '^\s*(pub )?fn (XdcConstraints_from_raw|XdcConstraints_port_count|XdcConstraints_clock_ports|parse_pin_line|extract_value|extract_port|preprocess_for_nextpnr|minimal_qmtech_xdc)\(': 8. grep -cE '^\s*test\s+(["|[A-Za-z_])': 10 (≥ 8).
• Boundary: git status --short — exactly this one file. The repo's lefthook pre-commit passed.
• dupe_scan by name on a clean origin/master worktree: 18 of the 19 names unique across 2040 specs. extract_value already exists in specs/fpga/vcd_conformance_compare.t27:98 — the name is mandated by this issue, and the two bodies are not byte-identical: the bare body scan adds no duplicate group (752 duplicate bodies in 221 groups on base, identical with this spec present, zero mention of this file).

Dmitrii Fedorov (@dmitrii-f-t27)

[dmitrii-f-t27]

@gHashTag Please merge this PR into master via the golden chain — rights on gHashTag/t27 are read-only for me (403), so the merge itself needs your action.

What this is: the #9567 port — crates/trios-fpga/src/xdc.rs (gHashTag/trios, at 8b229e9489ee) re-authored as specs/port/trios/crates/trios-fpga/src/xdc.t27. One file, head fd02bf0bd, Closes #9567.

What is verified:

• t27c parse OK, spec-status IMPLEMENTED, typecheck 0 errors / 0 warnings, coverage 19/19 (100%) — no transports in this port, every required name is a tested pure decision, t27c test-report 10 tests / 10 pass / 0 FAIL / 0 BLOCKED, 0 vacuous, against the original's own test expectations (a bare create_clock line produces no entry; the board file parses to 12 pins with 0 clock entries; an empty source to 0).
• gen → 207 lines, 0 not yet implemented; the 8 required names count exactly 8; 10 test blocks; boundary exactly the one file.
• dupe_scan: 18 of 19 names unique across 2040 specs; extract_value already exists in specs/fpga/vcd_conformance_compare.t27 — the name is mandated by this issue and the bodies are not byte-identical: the bare body scan adds no duplicate group (752 bodies / 221 groups on base, identical with this spec present).
• The t27b-native-run artifact of this head (commit fd02bf0, run 38990550525): xdc.t27 row — reference pass, t27b pass, tests 10, invariants 0, asserts 49, blockers [], detail empty, reference_disagree: [].

CI (head fd02bf0): required trio green — validate, check-linked-issue, parse-ratchet; 26 checks pass overall, incl. emit-bitexact, t27b-native-linux, t27b-native-macos, coverage, own-language.

The 3 reds are the base-red trio, not this change: cli-tri (the include_str! of the #3324-removed workflow file), duplicate-bodies (only the known base names; zero mention of this spec's names, verified in the log), t27b-native-ratchet (the same verdict red the Queen's port PRs carry; this spec's own row is reference pass + t27b pass — the registration debt is the UNLISTED class).

After the merge I will: verify the spec file live on the merge SHA, confirm #9567 auto-closed, and file the 14-step report.

Dmitrii Fedorov (@dmitrii-f-t27)