ci(chipdb): cache two more workflows, state why five probes stay uncached

.github/workflows/bufr-divide-probe.yml

@@ -84,6 +84,7 @@ jobs:
           '
           ls -l bin/
 
+      # chipdb-uncached: bbaexport runs from the image's tree after checking out NEXTPNR_STOCK, so the chipdb belongs to that revision, not to the image ID the cache keys on; dispatch-only, 7 runs, last 2026-08-18 (#846)
       - name: Generate the chipdb
         run: |
           mkdir -p chipdb

.github/workflows/fpga-hslm-bitstream.yml

@@ -73,18 +73,14 @@ jobs:
             " 2>&1 | tee /tmp/yosys.log
           grep "Estimated number of LCs" /tmp/yosys.log
 
+      # Keyed on the ID of the image pulled above, so it misses exactly when
+      # regymm/openxc7:latest moves (gHashTag/trinity-fpga#846).
       - name: Generate chipdb
-        run: |
-          mkdir -p fpga/openxc7-synth/chipdb
-          docker run --rm \
-            -v "$PWD/fpga/openxc7-synth:/work" -w /work \
-            regymm/openxc7 \
-            bash -c "
-              cd /nextpnr-xilinx && \
-              python3 xilinx/python/bbaexport.py --device xc7a100tfgg676-1 --bba /work/chipdb/xc7a100tfgg676-1.bba && \
-              bbasm -l /work/chipdb/xc7a100tfgg676-1.bba /work/chipdb/xc7a100tfgg676-1.bin
-            "
-          ls -lh fpga/openxc7-synth/chipdb/xc7a100tfgg676-1.bin
+        uses: ./.github/actions/openxc7-chipdb
+        with:
+          part: xc7a100tfgg676-1
+          image: regymm/openxc7:latest
+          out: fpga/openxc7-synth/chipdb/xc7a100tfgg676-1.bin
 
       - name: nextpnr place and route
         run: |

.github/workflows/iddr-golden-diff.yml

@@ -141,6 +141,8 @@ jobs:
       # and diff its ILOGIC configuration against Vivado's. IFFDELMUXE3 is now
       # exonerated -- absence IS the direct position -- so what remains is
       # whatever else Vivado programs on a working IDDR and we do not.
+      #
+      # chipdb-uncached: the composite action would fit, but this probe has run 3 times, the last on 2026-08-18, and it is the instrument behind openXC7/nextpnr-xilinx#114; changing it saves nothing measurable (#846)
       - name: Build the same design with openXC7 and diff the ILOGIC config
         run: |
           set +e

.github/workflows/iddr-vivado-diff.yml

@@ -261,6 +261,7 @@ jobs:
       # Uses the frozen toolchain, nextpnr built in the image, chipdb generated
       # from the same tree -- the same construction as the benchmark harness,
       # for the same reason.
+      # chipdb-uncached: nextpnr and the chipdb are both built here from NEXTPNR_REV and PRJXRAY_DB_REV, not taken from the image the cache keys on; dispatch-only, 9 runs, last 2026-08-15 (#846)
       - name: Build the same design with openXC7
         continue-on-error: true
         env:

.github/workflows/openxc7-vs-vivado-openxc7-half.yml

@@ -196,6 +196,8 @@ jobs:
       # the image instead of from the freeze. So the pinned revision is checked
       # out here too, the checkout is asserted rather than assumed, and bbasm
       # comes from the build artifact.
+      #
+      # chipdb-uncached: built from the nextpnr-xilinx tree at NEXTPNR_REV, not the image, so an image-keyed cache would hand it the wrong constids (above); dispatch-only, 6 runs, last 2026-08-14 (#846)
       - name: Generate
         run: |
           chmod +x npnr/bin/nextpnr-xilinx npnr/bin/bbasm

.github/workflows/part-coverage.yml

@@ -195,18 +195,34 @@ jobs:
           fi
           cat work/top.v work/top.xdc
 
+      # The chipdb is a pure function of the part and the pinned image, and this
+      # job ran bbaexport for every part every day (gHashTag/trinity-fpga#846).
+      # continue-on-error keeps a chipdb failure an INCONCLUSIVE verdict below,
+      # as it was when the chipdb was built inside the next step, rather than a
+      # job that stops before the verdict is written.
+      - name: Chipdb (cached per part and image)
+        id: chipdb
+        continue-on-error: true
+        uses: ./.github/actions/openxc7-chipdb
+        with:
+          part: ${{ matrix.part }}
+          image: ${{ env.OPENXC7_IMAGE }}
+          out: work/chip.bin
+
       - name: Build it, all the way to frames
         id: build
+        env:
+          CHIPDB_OUTCOME: ${{ steps.chipdb.outcome }}
+          CHIPDB_HIT: ${{ steps.chipdb.outputs.cache-hit }}
+          CHIPDB_KEY: ${{ steps.chipdb.outputs.key }}
         run: |
           set +e
-          docker run --rm -v "$PWD:/w" -w /w "$OPENXC7_IMAGE" bash -c '
-            set -e
-            cd /nextpnr-xilinx
-            BB=$(find / -name bbasm -type f -perm -u+x 2>/dev/null | head -1)
-            python3 xilinx/python/bbaexport.py --device ${{ matrix.part }} --bba /w/work/c.bba
-            $BB -l /w/work/c.bba /w/work/chip.bin
-          ' > out/chipdb.log 2>&1
-          echo "chipdb_rc=$?" >> $GITHUB_OUTPUT
+          echo "chipdb outcome=$CHIPDB_OUTCOME cache-hit=${CHIPDB_HIT:-false} key=$CHIPDB_KEY" > out/chipdb.log
+          chipdb_ok=false
+          [ "$CHIPDB_OUTCOME" = success ] && chipdb_ok=true
+          chipdb_rc=1
+          if [ "$chipdb_ok" = true ]; then chipdb_rc=0; fi
+          echo "chipdb_rc=$chipdb_rc" >> $GITHUB_OUTPUT
 
           docker run --rm -v "$PWD:/w" -w /w/work "$OPENXC7_IMAGE" bash -c '
             yosys -p "synth_xilinx -flatten -abc9 -arch xc7 -top top; write_json /w/out/d.json" top.v

.github/workflows/router-vcc-reducer.yml

@@ -44,6 +44,7 @@ jobs:
         run: |
           for i in 1 2 3 4 5 6; do docker pull "$OPENXC7_IMAGE" && break; sleep $((i*20)); done
 
+      # chipdb-uncached: the composite action would fit, but this reducer has run 3 times, the last on 2026-08-18, and it is the reducer promised on openXC7/nextpnr-xilinx#114; changing the instrument saves nothing measurable (#846)
       - name: Generate the chipdb
         run: |
           mkdir -p chipdb out