Qualify Cortex-M capture on one STM32 Nucleo board

[TheusHen]

Goal

Publish the first reproducible real-board qualification record for Cortex-M capture using one STM32 Nucleo board.

Required record

• Exact Nucleo model and board revision.
• MCU, SDK/HAL, compiler and version, optimization flags, linker script, and Latch commit.
• Retained-memory placement and reset behavior.
• Procedures and sanitized evidence for a real HardFault, watchdog reset, and one interrupted or repeated-boot scenario.
• CPU/FPU/cache assumptions and any untested nested-fault behavior.
• Decoder output tied to the exact firmware build ID.
• A clear pass/fail table and instructions another person can reproduce.

Safety and scope

This is qualification evidence for one named setup, not a claim for all STM32 or Cortex-M devices. Do not publish keys, proprietary firmware, device identifiers, or raw customer memory.

Comment with the board/toolchain you have before starting. Maintainers can help shape the HIL fixture and evidence format.