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Add Neoverse-V2 SPE support and new Cortex/Neoverse PMU names - #161

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hbrobin wants to merge 3 commits into
openvelinux:6.6-velinuxfrom
hbrobin:6.6-velinux-extend-pmu-spe-core-names
Open

hbrobin wants to merge 3 commits into
openvelinux:6.6-velinuxfrom
hbrobin:6.6-velinux-extend-pmu-spe-core-names

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@hbrobin hbrobin commented Oct 21, 2026

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Upstream Patch List

041c0e5715a6  perf arm-spe: Add Neoverse-V2 to common data source encoding list
695b1fd08510  dt-bindings: arm: pmu: Add new Cortex and Neoverse cores
c99d00ef9e73  perf: pmuv3: Add new Cortex and Neoverse PMUs

ByteDance ci-checker Results

Key:
[----] : patches are identical
[####] : number of functional differences between upstream/downstream patch
[down] : patch is downstream-only
The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively

001/3:[----] [--] 'perf arm-spe: Add Neoverse-V2 to common data source encoding list'
002/3:[----] [--] 'dt-bindings: arm: pmu: Add new Cortex and Neoverse cores'
003/3:[----] [--] 'perf: pmuv3: Add new Cortex and Neoverse PMUs'

============================================
 Summary
============================================

 Total checks: 5
 Passed:       5
 Failed:       0

  downstream-format-validator    PASS
  upstream-format-validator      PASS
  upstream-fix-tag-validator     PASS
  upstream-fix-scanner           PASS
  upstream-variance-viewer       PASS

Unit Tests

TC1 Build and boot:
    Build and boot of the kernel and modules with no PMU initialization errors.

TC2 perf test regression:
    Passed the selected perf PMU/SPE regression tests.

bwicaksononv and others added 3 commits October 21, 2026 07:08
commit 041c0e5715a65a1b653283b853b4ca973780607a upstream.

Add Neoverse-V2 MIDR to the common data source encoding range list.

Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com>
Reviewed-by: Leo Yan <leo.yan@arm.com>
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Reviewed-by: James Clark <james.clark@linaro.org>
Link: https://lore.kernel.org/r/20241003185322.192357-7-leo.yan@arm.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>
Signed-off-by: Bin Huang <bin.huang2@arm.com>
commit 695b1fd upstream.

Add compatible strings for the PMUs in the Arm Cortex-A725, Cortex-X925,
Neoverse N3, Neoverse V2, Neoverse V3 and Neoverse V3AE cores.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20240628145612.1291329-2-andre.przywara@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Bin Huang <bin.huang2@arm.com>
commit c99d00e upstream.

Add support for the Arm Cortex-A725, Cortex-X925, Neoverse N3,
Neoverse V2, Neoverse V3 and Neoverse V3AE.
This just adds the names and connects them with their DT compatible
strings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20240628145612.1291329-3-andre.przywara@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Bin Huang <bin.huang2@arm.com>

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3 participants