hw/mips: add Sony PlayStation 2 machine by IxaKylin · Pull Request #48 · processmission/qemu

IxaKylin · 2026-10-30T10:59:21Z

Add a "ps2" machine that boots the meta-playstation2 Linux kernel
(linux-ps2 5.4) and runs its OpenGL library and SDL2 games.

There is no BIOS. QEMU builds a ROM0 with a ROM directory, ROMVER and
empty IOP modules, whose reset code sets Status.EIE and jumps to the
ELF kernel given with -kernel. The IOP runs no code: the SIF answers
the SIF commands and remote procedure calls of the kernel in place of
the IOP modules (heap, module loader, IOP memory access, interrupt
relay), as PCSX2 does with its high-level emulation of the IOP.

The machine has:

the EE interrupt and DMA controllers, timers and serial port (ttyS0)
the GS privileged registers, CRT controller and vblank interrupts, and the GIF with PACKED, REGLIST and IMAGE packets; drawing covers points, lines, triangles and sprites, Gouraud shaded, textured with colour lookup tables, fogged, alpha and depth tested and blended, with host to local, local to local and local to host transfers
VIF1 and a VU1 interpreter, whose XGKICK sends packets to the GS
the CDVD S-commands for the real time clock and the console model
the USB OHCI host controller of the IOP, and the DEV9 expansion bay with the SPEED chip and an ATA hard disk

Add the R5900 CPU model, with its Status.EIE master interrupt enable,
64-bit operations in all modes, and the SA register with MFSA, MTSA,
MTSAB and MTSAH, kept in a vmstate subsection.

Signed-off-by: Mig Yang temashking@foxmail.com

Add a "ps2" machine that boots the meta-playstation2 Linux kernel (linux-ps2 5.4) and runs its OpenGL library and SDL2 games. There is no BIOS. QEMU builds a ROM0 with a ROM directory, ROMVER and empty IOP modules, whose reset code sets Status.EIE and jumps to the ELF kernel given with -kernel. The IOP runs no code: the SIF answers the SIF commands and remote procedure calls of the kernel in place of the IOP modules (heap, module loader, IOP memory access, interrupt relay), as PCSX2 does with its high-level emulation of the IOP. The machine has: - the EE interrupt and DMA controllers, timers and serial port (ttyS0) - the GS privileged registers, CRT controller and vblank interrupts, and the GIF with PACKED, REGLIST and IMAGE packets; drawing covers points, lines, triangles and sprites, Gouraud shaded, textured with colour lookup tables, fogged, alpha and depth tested and blended, with host to local, local to local and local to host transfers - VIF1 and a VU1 interpreter, whose XGKICK sends packets to the GS - the CDVD S-commands for the real time clock and the console model - the USB OHCI host controller of the IOP, and the DEV9 expansion bay with the SPEED chip and an ATA hard disk Add the R5900 CPU model, with its Status.EIE master interrupt enable, 64-bit operations in all modes, and the SA register with MFSA, MTSA, MTSAB and MTSAH, kept in a vmstate subsection. Signed-off-by: Mig Yang <temashking@foxmail.com>

zevorn · 2026-10-30T11:39:01Z

Awesome! Thanks for the contribution!

zevorn

This patch is doing too much. Please split some atom commits for this series. We still need to follow QEMU's upstream coding style and development style.

zevorn · 2026-10-30T11:46:20Z

+~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+The ``ps2`` machine models the PlayStation 2 as far as the Linux kernel
+for it needs, such as the one built by the meta-playstation2 layer


with yocto build?

zevorn · 2026-10-30T11:48:16Z

+
+Example::
+
+   qemu-system-mips64el -M ps2 -kernel vmlinux -serial stdio \


We need a functional test case for PS2. I suggest you use qemu-machine-images to build a standard PS2 image for this hardware machine model, along with a functional test case.

zevorn · 2026-10-30T11:49:39Z

+ * instantaneous here, so the transmit FIFO always reads as empty.  The
+ * Linux driver polls, so no interrupt line is modelled.
+ *
+ * Copyright (c) 2026 Process Mission


You're welcome to add your author define but I'm also fine with you using Process Mission :).

zevorn · 2026-10-30T11:50:19Z

+    PS2SIOState *s = opaque;
+
+    switch (addr) {
+    case PS2_SIO_LCR:


I suggest you use the QEMU RegisterInfo framework instead. Now, bell-metal or similar register-switch keys like these control the source code. This is a much more convenient way to handle it.

zevorn · 2026-10-30T11:51:26Z

+#define PS2_GS_VBLANK_NS        1400000
+
+/* General register addresses. */
+#define GS_PRIM         0x00


These models are similar. Use QEMU's RegisterInfo framework as much as possible to write them. It makes handling register behavior much easier and helps avoid mistakes, since even agents tend to hallucinate when doing modeling.

zevorn · 2026-10-30T11:52:49Z

+    MemoryRegion iomem;
+    char *machine_name;
+
+    uint8_t param[PS2_SCMD_FIFO_SIZE];


For the macro definition of this array, I suggest replacing it with a register macro or wrapping it in another layer of abstraction. That would make the code much more readable.

zevorn · 2026-10-30T11:54:18Z

+#define PS2_TIMER_HOLD          0x30
+
+#define PS2_TIMER_MODE_CLKS     0x0003
+#define PS2_TIMER_MODE_ZRET     (1 << 6)


Instead of doing manual bit shifts here, use QEMU's FIELDS macros. The FIELDS macros include definitions down to the bit and bitfield level, so we don't have to write manual logic shift operations ourselves. It's much more standard and cleaner.

zevorn · 2026-10-30T11:54:59Z

+
+# REGIMM
+
+MTSAB           000001 rs:5  11000 imm:16


If we add new instruction, we need to add some disassembler. The return edge needs to be added as well.

zevorn · 2026-10-30T11:55:27Z

 static bool trans_PCGTW(DisasContext *ctx, arg_r *a)
 {
-    return trans_parallel_compare(ctx, a, TCG_COND_GE, 32);
+    return trans_parallel_compare(ctx, a, TCG_COND_LT, 32);


These bug fixes are worth using atomic commits for.

zevorn · 2026-10-30T11:55:44Z

+         * manual (https://wiki.qemu.org/File:C790.pdf) describes the C790,
+         * a follow-up to the R5900. The R5900 FPU
+         *
+         * - is not IEEE 754-1985 compliant: no NaN, no infinities, no


Good comments.

zevorn requested changes Oct 30, 2026

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hw/mips: add Sony PlayStation 2 machine - #48

hw/mips: add Sony PlayStation 2 machine#48
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		Example::

		qemu-system-mips64el -M ps2 -kernel vmlinux -serial stdio \

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