FROMLIST: arm64: dts: qcom: hamoa-pmics: Add ADC support#1375
FROMLIST: arm64: dts: qcom: hamoa-pmics: Add ADC support#1375raryan-qcom wants to merge 8 commits into
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…oring Add support for ADC_TM part of PMIC5 Gen3. This is an auxiliary driver under the Gen3 ADC driver, which implements the threshold setting and interrupt generating functionalities of QCOM ADC_TM drivers, used to support thermal trip points. Reviewed-by: Jonathan Cameron <jonathan.cameron@huawei.com> Link: https://lore.kernel.org/all/20260209105438.596339-5-jishnu.prakash@oss.qualcomm.com/ Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
…750 PMICs On Glymur, Kaanapali, and SM8750, PMIC info is not being properly populated in qcom_socinfo. Its shows `unknown` as PMIC subtypes are not updated in the socinfo. root@glymur-crd:/sys/kernel/debug/qcom_socinfo# cat pmic_model unknown (92) root@glymur-crd:/sys/kernel/debug/qcom_socinfo# cat pmic_model_array unknown (92) unknown (93) unknown (98) unknown (98) unknown (97) unknown (97) unknown (96) unknown (96) Update the SUBTYPE info for PMICs present on Glymur,Kaanapali and SM8750 boards, to fix this issue. Also, there are some PMIC subtypes present in the socinfo but not present in the spmi header file, add these entries to keep both definitions aligned. Link: https://lore.kernel.org/all/20260507-fury-v1-1-d24e4bb5b774@qti.qualcomm.com/ Signed-off-by: Raj Aryan <raryan@qti.qualcomm.com>
Add macro definitions for virtual channels (combination of ADC channel number and PMIC SID number), to be used in devicetree by clients of ADC5 GEN3 device and in the "reg" property of ADC channels. Link: https://lore.kernel.org/all/20260430-adc5_gen3_dt-v1-1-ab2bb40fd490@oss.qualcomm.com/ Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Add ADC nodes for the four PMM8654au PMICs (pmm8654au_0 through pmm8654au_3) on the Lemans platform. Each ADC node exposes the following ADC channels: - DIE_TEMP: PMIC die temperature channel - VPH_PWR: Battery/supply voltage channel Also add the io-channels and io-channel-names properties under the temp-alarm nodes so that they can get temperature reading from the ADC die_temp channels. Link: https://lore.kernel.org/all/20260430-adc5_gen3_dt-v1-2-ab2bb40fd490@oss.qualcomm.com/ Signed-off-by: Ayyagari Ushasreevalli <aushasre@qti.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Add ADC nodes for PMM8620AU PMIC instances (SID 0 and SID 2) present on the Monaco platform. Each ADC node exposes the following ADC channels: - DIE_TEMP: PMIC die temperature channel - VPH_PWR: Battery/supply voltage channel Link: https://lore.kernel.org/all/20260430-adc5_gen3_dt-v1-3-ab2bb40fd490@oss.qualcomm.com/ Signed-off-by: Ayyagari Ushasreevalli <aushasre@qti.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
Add bindings for the Qualcomm MBG (Master Bandgap) temperature alarm peripheral found on the PM8775 PMIC. Unlike the existing SPMI temp alarm peripheral, the MBG peripheral supports both hot and cold thresholdi monitoring across two programmable levels (LVL1 and LVL2), with interrupt status reported via a fault status register over SPMI. Link: https://lore.kernel.org/all/20260601-spmi-mbg-driver-v1-1-b4892b55a17f@oss.qualcomm.com/ Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Co-developed-by: Sachin Gupta <sachin.gupta@oss.qualcomm.com> Signed-off-by: Sachin Gupta <sachin.gupta@oss.qualcomm.com>
Add driver for the Qualcomm MBG thermal monitoring device. It monitors the die temperature, and when there is a level 1 upper threshold violation, it receives an interrupt over spmi. The driver reads the fault status register and notifies thermal accordingly. Link: https://lore.kernel.org/all/20260601-spmi-mbg-driver-v1-2-b4892b55a17f@oss.qualcomm.com/ Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Co-developed-by: Sachin Gupta <sachin.gupta@oss.qualcomm.com> Signed-off-by: Sachin Gupta <sachin.gupta@oss.qualcomm.com>
Add ADC node and define channels for: - Die temperature for PMK8550, PM8550VE* and PMC8380* PMICs. - PM8550: Die temperature, VPH power, and system thermistors. Define thermal zones 'sys-0-thermal' through 'sys-6-thermal' which correspond to the off-PMIC system thermistors connected via PM8550 AMUX/GPIO lines. Also,add io-channels and io-channel-names properties to the temp_alarm nodes so that they can get temperature reading from the ADC die_temp channels. Link: https://lore.kernel.org/all/20260614-adc5_gen3_dt-v2-4-32ec576c5865@oss.qualcomm.com/ Signed-off-by: Ayyagari Ushasreevalli <aushasre@qti.qualcomm.com> Signed-off-by: Jishnu Prakash <jishnu.prakash@oss.qualcomm.com>
🔨 Build Failure Analysis — PR #1375PR: #1375
VerdictNo compilation errors exist. The build failed during the pre-build automerge/integration phase due to merge conflicts in files unrelated to this PR. Both conflicts are pre-existing issues in the topic branch, not introduced by PR #1375. 📎 Detailed analysis: Full report |
🔨 Build Failure Analysis — PR #1375PR: #1375
VerdictNo compilation errors occurred. The build failed during the merge/integration phase with conflicts in 📎 Detailed analysis: Full report |
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Add ADC node and define channels for:
Define thermal zones 'sys-0-thermal' through 'sys-6-thermal' which correspond to the off-PMIC system thermistors connected via PM8550 AMUX/GPIO lines.
Also,add io-channels and io-channel-names properties to the temp_alarm nodes so that they can get temperature reading from the ADC die_temp channels.
Link: https://lore.kernel.org/all/20260614-adc5_gen3_dt-v2-4-32ec576c5865@oss.qualcomm.com/
CRs-Fixed: 4559466