Stage 1b: FFT benchmark scenarios and the instruction-count ratchet scaffold - #21

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claude/wave1-stage1b-bench

Sep 17, 2026

Commits on Sep 17, 2026

Add the FFT benchmark scenarios and the instruction-count ratchet scaffold

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dde8e11
bench: print checksums without the PRI macros

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fea137c
bench: bit-exact checksum, no seeding from pull requests, MinSizeRel size probe

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e77ec32