test: reproduce default SOIC-8 land mismatch with TI D0008A

[hrithik18k]

Reproduction only; no production footprint or default changes.

Using footprint="soic8" for a TI TLC555CD produces copper lands smaller and closer together than TI's D0008A example land pattern. This PR records that specific compatibility gap with independent reference coordinates, an expected-failure test, and visual snapshots.

Measured difference

Geometry	Default soic8	TI D0008A reference
Pad-row center spacing	4.30 mm	5.40 mm
Pad length × width	1.00 × 0.60 mm	1.55 × 0.60 mm
Pin pitch	1.27 mm	1.27 mm

Reference: TI TLC555 datasheet, SLFS043K, PDF page 39, D0008A example board layout, drawing 4214825/C. These are copper land dimensions, not body dimensions. TI also permits alternate land-pattern designs; this comparison does not establish a universal SOIC-8 default or claim that every alternative is invalid.

Reproduction

bun test tests/repro-soic8-ti-d0008a.test.ts

• A test.failing records the default footprint's mismatch with the TI reference. Changing it to test fails on the first pad's X coordinate: expected -2.70, received -2.15 mm.
• A normal positive-control test checks all eight pad numbers, coordinates, lengths, and widths using soic8_w6.95mm_p1.27mm_pl1.55mm_pw0.6mm. The 6.95 mm outer copper span is 5.40 + 1.55 mm.
• Normal snapshot tests cover the default footprint, the explicit footprint, and a same-scale overlay against the independently entered TI lands. Snapshot assertions and footprint setup stay outside test.failing, so a rendering/setup error cannot masquerade as the intended geometry failure.
• Only rectangular copper extents and pin numbering are compared numerically. Courtyard, solder mask, paste, and corner-radius compliance are outside this reproduction.

The existing default snapshot preserves generated geometry but does not verify it against this manufacturer's drawing. A follow-up can choose a named package preset or a deliberate default/migration policy; this PR leaves that decision open.

Validation

• New reproduction plus existing SOIC tests: 7 passed, including the expected failure; 56 assertions.
• Temporarily removing test.failing: 2 passed, 1 failed, specifically on the pad-coordinate mismatch.
• Package and TypeScript declaration build: passed.
• Changed test formatting and staged diff whitespace checks: passed.
• SVG overlay rendered and visually inspected.
• Full suite on Windows/Bun 1.3.14: 586 passed, 3 failed. The same three failures reproduce without the new test: smf, parity/sod523, and diode-kicad-parity/sod523 snapshot mismatches.
• Repository-wide tsc --noEmit has existing diagnostics; removing the new test produces identical diagnostic output, with no new diagnostics from this PR.