policy: remove the spent cli/tri/src/gates.rs foreign exception (Refs…

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Fix Carries Source on: pull_request 1

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Harness scratch directories on: pull_request 2

No test binary shares one scratch directory

Verilog Widths on: pull_request 2

Verilog widths (absurd-width ledger)

Documented Commands on: pull_request 2

Documented t27c subcommands exist

PHI Loop CI on: pull_request 1

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Corpus Ratchet on: pull_request 4

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Orphaned modules on: pull_request 2

Every source file is reachable from its crate root

Conflict Markers on: pull_request 2

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Schema Validation on: pull_request 2

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Own Language on: pull_request 2

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Duplicate Body Ratchet on: pull_request 1

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Untrusted Input Gate on: pull_request 1

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Withdrawn Number Gate on: pull_request 2

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cli-tri on: pull_request 4

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Issue Gate on: pull_request_target 3

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Spec Parse Ratchet on: pull_request 2

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Gate Topology on: pull_request 1

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L1 TRACEABILITY Check on: pull_request 2

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Damage negatives (false-positive fixtures)

Seal Coverage on: pull_request 2

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PR Dashboard on: pull_request 1

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Issue Gate on: pull_request_target 2

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Auto Merge Ready PRs on: pull_request_target 1

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PR budget (at most 20 open ready PRs per author; the excess waits as a draft) on: pull_request_target 3

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Own Language on: pull_request 2

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policy: remove the spent cli/tri/src/gates.rs foreign exception (Refs…

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