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igla-coder: ternary x int8 GPU GEMM kernel spec, bit-exact in three modes (Closes #10361) - #10362

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Closes #10361. Refs #10360, the RFC with the cost model and the gen-cuda owner-approved-foreign label request.

What

  • specs/igla/coder/ternary_gemm_gpu.t27 is a tiled ternary x int8 GEMM laid out the way a CUDA kernel is:
    • block_tile is the __global__ body for one block, with zero-padded shared tiles and per-thread register micro-tiles.
    • Weights are packed 2-bit (4 per byte) and unpacked when the tile is loaded.
    • gemm_tiled is the grid launch.
    • It has three inner-product modes: MODE_SELECT (add/subtract), MODE_I8_MMA (mma.sync s8 semantics) and MODE_DP4A.
  • .trinity/seals/coder_igla-coder-ternary-gemm-gpu.json is the seal, written by t27c seal --save on the Railway lab.

Every tiling and every mode is compared with == against a scalar reference. Bit-exact comparison is valid because products lie in [-128, 128] and accumulation is i32. An invariant proves nothing overflows while k <= 16777215; d_ff = 3456 is far below that.

The spec imports nothing. specs/igla/race/ternary_gemm.t27 and ternary_mac.t27 do not compile under t27c or t27b today, and they contain wrong argument orders and a wrong expected value. Details are in #10360. The correct 8x8 path is mirrored here instead.

Evidence (Railway lab, 2026-10-18, spec sha256 573a8240...6d)

  • t27c test-report: 17 of 17 tests, 7 invariants proved, 0 vacuous.
  • t27b (aarch64 JIT under qemu): 17 passed, 7 invariants held, 270 ms. With --overflow trap: also 17 of 17.
  • Negative control: with two assertions mutated, both compilers fail exactly those two tests and pass the other 15.
  • The dupe scan reports no new duplicate body and no known group grew.

No foreign code was added. The backend and the bench wait for the label on #10360.

🤖 Generated with Claude Code

…odes (Closes #10361)

specs/igla/coder/ternary_gemm_gpu.t27 lays the kernel out as CUDA would:
block_tile is the __global__ body for one block, with zero-padded shared
tiles and per-thread register micro-tiles; weights are packed 2-bit and
unpacked at tile load; gemm_tiled is the grid launch. Three inner-product
modes (add/subtract, i8 MMA, dp4a) are compared with == against a scalar
reference. That is valid because products lie in [-128,128] with i32
accumulation, so nothing overflows while k <= 16777215 (an invariant).

The spec imports nothing: the race references it mirrors do not compile
under t27c or t27b today; the correct 8x8 path is copied in.

Railway lab, 2026-10-18: t27c 17/17 tests, 7 invariants proved, 0
vacuous; t27b (aarch64 JIT) 17/17, 7 held, also under --overflow trap.
A negative control with two mutated assertions fails exactly those two
under both compilers. Seal from t27c seal --save on the lab; dupe scan
reports no new duplicate body.

Refs #10360 (cost model and gen-cuda label request).

Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Generated at: 2026-10-18 09:32:25 UTC

Summary

Status Count
Total Open PRs 50
PRs with Failing Checks 49
PRs with All Checks Green 1
READY 0
FAILING 49
PENDING 0
NO CHECKS YET 0

These columns do not partition: 0 + 49 + 0 + 0 = 49, and there are 50 open PRs. A PR is being counted twice or not at all.

Seal Status

  • ⚠️ STALE -- sha256(compiler.rs)=fad12492937a != manifest seal=87e5cbd3ad94.
    The committed NMSE numbers were certified against an older compiler.rs.
    Run scripts/reseal-check.sh locally for the two-step reseal command (advisory; not a merge gate).

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igla-coder: ternary x int8 GPU GEMM kernel spec, bit-exact in three modes

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