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analog M5d: nand, nor, tgate and tracking-switch rows of the external team's checks from the PSP103 tables, cross-checked with ngspice: 5 PASS, 1 FAIL, 7 NOT MODELLED of 13 - #11279
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…s computed from the PSP103 tables, each cross-checked with ngspice -- 5 PASS, 1 FAIL, 7 NOT MODELLED of 13 specs/analog/mos_psp103_gates.t27 (new): the two-input gate's DC output (the inverter's bisection with the stack's middle node solved inside it), the tgate's Ron and off leakage, on the tt log tables of the inverter, no new table. Cross-checked against our own ngspice-47 + PSP103 runs of the same cells (specs/analog/decks/accept_gates.cir, accept_tgate.cir, accept_switch.cir). - nand and nor levels: every level microvolts from its rail, within 2.4 uV of ngspice (bar 10 uV) -> both rows PASS, both blocks PASS. - tgate off leakage 291.0 pA against ngspice 285.6 / 271.4 pA (+1.9 / +7.2 %, bar 10 %): PASS. Ron 1718 ohm at 0.75 V and 2109 ohm worst against ngspice's real cell 2460 and 2776 ohm (-30.2 / -24.0 %): the tables have no body effect; with each bulk tied to its source ngspice is within 0.06 % of the tables at all 27 points. Both rows stay NOT MODELLED, with the numbers and the reason. - tracking error: -1.97 uV against ngspice's PSP103 cell +0.29 / -0.17 uV (2.3 uV, bar 10 uV). Hold step and droop stay NOT MODELLED (square law: no charge, no leakage); ngspice's PSP103 cell gives -1.60 / -1.73 mV and no droop, shown in the doc. - the reference run reproduces the report: Ron 2459.6 ohm (report 2.44 kohm), worst 2776.1 (2.78), leakage 0.2856 nA (0.29), hold step -1.596 / -1.730 mV (-1.6 / -1.7). Counts: blocks 5 PASS / 1 FAIL / 7 NOT MODELLED (was 3 / 1 / 9), rows 19 / 1 / 10 (was 16 / 1 / 13), pinned by as_all_blocks and the new as_all_rows. Updates #11263 Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
… team's checks from the PSP103 tables, cross-checked with ngspice: 5 PASS, 1 FAIL, 7 NOT MODELLED of 13 (Closes #11263) Merge of master plus sealing, gates run on the merged tree with t27c from master: tests clean with vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's. Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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October 20, 2026 08:14
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This was referenced Oct 20, 2026
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Closes #11263
analog M5d: nand, nor, tgate and tracking-switch rows of the external team's checks from the PSP103 tables, cross-checked with ngspice: 5 PASS, 1 FAIL, 7 NOT MODELLED of 13
Gates run on the merged tree (t27c from master): 2 spec(s) with tests clean and vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's (inherited red).
TEST specs/analog/accept_sar.t27 tests=[14] fail=[0] vacuous=[0]
TEST specs/analog/mos_psp103_gates.t27 tests=[6] fail=[0] vacuous=[0]
SEAL specs/analog/accept_sar.t27 :: all hashes MATCH
SEAL specs/analog/mos_psp103_gates.t27 :: all hashes MATCH
TYPES RATCHET: CLEAN
DUPE failing=4 extra-vs-master=[]
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