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analog M3e: a source-to-bulk axis on the PSP103 log tables, so the tgate Ron with its bulks on the rails is within 0.09 percent of ngspice - #11288
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…ate's Ron with its bulks on the rails is within 0.09 percent of ngspice -- accept_sar now 6 PASS, 1 FAIL, 6 NOT MODELLED of 13 blocks (Closes #11283) The 2-D log tables (TT_LG_N, TT_LG_P) have each bulk tied to its source, so the model had no body effect and the tgate's Ron (bulks on the rails) read 30.2 and 24.0 percent under ngspice's real cell, past the 10 percent bar: the two Ron rows of accept_sar.t27 were NOT MODELLED. This adds the third axis. - specs/analog/decks/psp103_idpa_vsb_tt.cir (FR-001, FR-004): psp103_idpa_tt.cir with the bulk of each device moved off its source (NMOS at -Vsb, PMOS at 1.5 V + Vsb); same grid, same integer encoding; Vsb = 0, 0.25, .. 1.5 V (7 slices) and 1000 held-out currents at cell centres between slices. Run twice on the reference host (ngspice-47, container, 2 threads, 46 s and 48 s), identical data rows. - specs/analog/mos_psp103_vsb_data.t27 (new, 566 kB): the six slices above 0 of both devices (12 tables) and the held-out currents, pins, the accessors vsb_tab / vsb_fine; the slice 0 is the existing 2-D table. 3 tests, including: at Vsb = 0 the read is the 2-D read bit for bit (FR-002), at a slice it is that slice's read. - specs/analog/mos_table.t27 (FR-002): lg_fine_vsb blends the log word of two slices (weights 2^22 = 0.25 V); the tail of lg_fine is factored into lg_cur and shared, not copied (lg_fine unchanged in value). 1 new test (synthetic slices, closed form). - specs/analog/mos_psp103_gates.t27 (FR-003, FR-005): gt_tg_i / ron / worst / gap take body (true: Vsb of each device follows its source, bulks on the rails; false: Vsb forced to 0, the 2-D read). Ron with the body effect: 2461.2 ohm at 0.75 V (ngspice real cell 2459.6, +0.065 percent), 2777.5 ohm worst of 27 (2776.1, +0.049 percent), largest of the 27 gaps 0.090 percent. Held-out currents between slices: 1.71 percent (NMOS), 2.51 percent (PMOS) against a bar of 3 percent. Negative controls: Vsb forced to 0 is 31.1 percent off at the worst point and refused by the same 10 percent bar; the held-out currents read with Vsb forced to 0 are 105 and 424 times off; the two devices' Vsb exchanged is 32.3 percent off. 3 new tests (9 in all). - specs/analog/accept_sar.t27: the tgate block reads the body effect; the two Ron rows are PASS (inside the 10 percent bar and the report's 30 and 50 kohm); the forced-0 read is kept as a control and still gives NOT MODELLED. Blocks 6 PASS / 1 FAIL / 6 NOT MODELLED (was 5 / 1 / 7), rows 21 / 1 / 8 (was 19 / 1 / 10). - docs/analog/accept-sar-2026-10-20.md: totals, the tgate rows, new section 3c. t27c test-report: mos_table 21/21, mos_psp103_vsb_data 3/3, mos_psp103_gates 9/9, accept_sar 14/14, and every importer (mos_psp103 40, mos_psp103_50c_data 4, sar_comparator 20, sar_comparator_psp 13, sar_kick_net 23, sar_switch 14, vacask_compare 7, psp103_inv_ax7203 15) with FAIL 0 and no vacuous pass; t27b --check: no MISMATCH on the four changed specs. No seal files are created here. Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
…ate Ron with its bulks on the rails is within 0.09 percent of ngspice (Closes #11283) Merge of master plus sealing, gates run on the merged tree with t27c from master: tests clean with vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's. Co-Authored-By: Claude Sonnet 5.5 <noreply@anthropic.com>
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This was referenced Oct 20, 2026
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Closes #11283
analog M3e: a source-to-bulk axis on the PSP103 log tables, so the tgate Ron with its bulks on the rails is within 0.09 percent of ngspice
Gates run on the merged tree (t27c from master): 4 spec(s) with tests clean and vacuous passes 0, seal --verify MATCH, tri types ratchet CLEAN, dupe_scan failure set a subset of master's (inherited red).
TEST specs/analog/mos_table.t27 tests=[21] fail=[0] vacuous=[0]
TEST specs/analog/mos_psp103_vsb_data.t27 tests=[3] fail=[0] vacuous=[0]
TEST specs/analog/mos_psp103_gates.t27 tests=[9] fail=[0] vacuous=[0]
TEST specs/analog/accept_sar.t27 tests=[14] fail=[0] vacuous=[0]
SEAL specs/analog/mos_table.t27 :: all hashes MATCH
SEAL specs/analog/mos_psp103_vsb_data.t27 :: all hashes MATCH
SEAL specs/analog/mos_psp103_gates.t27 :: all hashes MATCH
SEAL specs/analog/accept_sar.t27 :: all hashes MATCH
TYPES RATCHET: CLEAN
DUPE failing=4 extra-vs-master=[]
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