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fix(ci): read trinet_node_core.v in the TRI-NET baud and node-v2 workflows #889

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fix(ci): read trinet_node_core.v in the TRI-NET baud and node-v2 workflows #889

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7 changes: 6 additions & 1 deletion .github/workflows/ax7203-trinet-baud.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@ on:
branches: [main]
paths:
- 'fpga/vivado/trinet_node_v2_ax7203.v'
- 'fpga/portable/trinet_node_core.v'
- 'fpga/openxc7-synth/trinet_siphash24.v'
- '.github/workflows/ax7203-trinet-baud.yml'

Expand Down Expand Up @@ -51,9 +52,11 @@ jobs:

- name: Yosys
run: |
set -o pipefail
# tee-pipefail: no shell of its own; -nocarry is a yosys option, not bash -c
mkdir -p build/${{ matrix.name }}
docker run --rm -v "$PWD:/work" -w /work regymm/openxc7 yosys -p "
read_verilog fpga/openxc7-synth/trinet_siphash24.v fpga/vivado/trinet_node_v2_ax7203.v;
read_verilog fpga/openxc7-synth/trinet_siphash24.v fpga/portable/trinet_node_core.v fpga/vivado/trinet_node_v2_ax7203.v;
chparam -set BAUD_DIV_P ${{ matrix.div }} trinet_node_v2_ax7203;
synth_xilinx -flatten -abc9 -nocarry -nodsp -arch xc7 -top trinet_node_v2_ax7203;
setundef -zero -params; write_json build/${{ matrix.name }}/node.json" 2>&1 | tee /tmp/yosys.log
Expand Down Expand Up @@ -97,6 +100,8 @@ jobs:

- name: fasm2bit
run: |
set -o pipefail
# tee-pipefail: the tee is in this shell; bash -c runs fasm2frames && xc7frames2bit with no pipe, and docker returns its status
docker run --rm -v "$PWD:/work" -w /work regymm/openxc7 bash -c "
source /prjxray/env/bin/activate && fasm2frames --db-root /nextpnr-xilinx/xilinx/external/prjxray-db/artix7 --part xc7a200tfbg484-2 /work/build/${{ matrix.name }}/node.fasm /work/build/${{ matrix.name }}/node.frames && /prjxray/build/tools/xc7frames2bit --part_file /nextpnr-xilinx/xilinx/external/prjxray-db/artix7/xc7a200tfbg484-2/part.yaml --part_name xc7a200tfbg484-2 --frm_file /work/build/${{ matrix.name }}/node.frames --output_file /work/build/${{ matrix.name }}/trinet_${{ matrix.name }}.bit"
sha256sum build/${{ matrix.name }}/trinet_${{ matrix.name }}.bit | tee build/${{ matrix.name }}/trinet_${{ matrix.name }}.bit.sha256
Expand Down
11 changes: 9 additions & 2 deletions .github/workflows/ax7203-trinet-node-v2.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -5,6 +5,7 @@ on:
branches: [main, tri-net-ternary-internet]
paths:
- 'fpga/vivado/trinet_node_v2_ax7203.v'
- 'fpga/portable/trinet_node_core.v'
- 'formal/trinet_node_v2_tb.v'
- 'fpga/openxc7-synth/trinet_siphash24.v'
- 'formal/trinet_siphash24_tb.v'
Expand All @@ -23,13 +24,15 @@ jobs:
run: python3 conformance/trinet_mac32_conformance_ax7203.py --self-test
- name: SipHash core vs the published vectors (iverilog)
run: |
set -o pipefail
sudo apt-get update -qq && sudo apt-get install -y -qq iverilog
iverilog -g2012 -o /tmp/sh.vvp formal/trinet_siphash24_tb.v fpga/openxc7-synth/trinet_siphash24.v
vvp /tmp/sh.vvp | tee /tmp/sh.log
grep -q "TB PASS" /tmp/sh.log || { echo "::error::the SipHash core does not match the published vectors"; exit 1; }
- name: Node v2 keyed receipts vs the Python golden (iverilog)
run: |
iverilog -g2012 -o /tmp/v2.vvp formal/trinet_node_v2_tb.v fpga/vivado/trinet_node_v2_ax7203.v fpga/openxc7-synth/trinet_siphash24.v
set -o pipefail
iverilog -g2012 -o /tmp/v2.vvp formal/trinet_node_v2_tb.v fpga/vivado/trinet_node_v2_ax7203.v fpga/portable/trinet_node_core.v fpga/openxc7-synth/trinet_siphash24.v
vvp /tmp/v2.vvp | tee /tmp/v2.log
grep -q "TB PASS" /tmp/v2.log || { echo "::error::keyed receipts do not match the golden"; exit 1; }

Expand All @@ -48,9 +51,11 @@ jobs:
docker image inspect regymm/openxc7:latest >/dev/null 2>&1 || { echo "::error::docker pull failed after 6 retries"; exit 1; }
- name: Yosys
run: |
set -o pipefail
# tee-pipefail: no shell of its own; -nocarry is a yosys option, not bash -c
mkdir -p build/trinet_node_v2
docker run --rm -v "$PWD:/work" -w /work regymm/openxc7 yosys -p "
read_verilog fpga/openxc7-synth/trinet_siphash24.v fpga/vivado/trinet_node_v2_ax7203.v;
read_verilog fpga/openxc7-synth/trinet_siphash24.v fpga/portable/trinet_node_core.v fpga/vivado/trinet_node_v2_ax7203.v;
synth_xilinx -flatten -abc9 -nocarry -nodsp -arch xc7 -top trinet_node_v2_ax7203;
setundef -zero -params; write_json build/trinet_node_v2/trinet_node_v2_ax7203.json" 2>&1 | tee /tmp/yosys.log
grep -E "Estimated|ERROR" /tmp/yosys.log
Expand Down Expand Up @@ -94,6 +99,8 @@ jobs:
echo "routed with placer/seed = $CLEAN"
- name: fasm2bit
run: |
set -o pipefail
# tee-pipefail: the tee is in this shell; bash -c runs fasm2frames && xc7frames2bit with no pipe, and docker returns its status
docker run --rm -v "$PWD:/work" -w /work regymm/openxc7 bash -c "
source /prjxray/env/bin/activate && fasm2frames --db-root /nextpnr-xilinx/xilinx/external/prjxray-db/artix7 --part xc7a200tfbg484-2 /work/build/trinet_node_v2/trinet_node_v2_ax7203.fasm /work/build/trinet_node_v2/trinet_node_v2_ax7203.frames && /prjxray/build/tools/xc7frames2bit --part_file /nextpnr-xilinx/xilinx/external/prjxray-db/artix7/xc7a200tfbg484-2/part.yaml --part_name xc7a200tfbg484-2 --frm_file /work/build/trinet_node_v2/trinet_node_v2_ax7203.frames --output_file /work/build/trinet_node_v2/trinet_node_v2_ax7203.bit"
sha256sum build/trinet_node_v2/trinet_node_v2_ax7203.bit | tee build/trinet_node_v2/trinet_node_v2_ax7203.bit.sha256
Expand Down
6 changes: 0 additions & 6 deletions tools/tee_pipefail_baseline.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -49,8 +49,6 @@
.github/workflows/ax7203-led-onehot.yml :: bitstream :: Yosys synthesis
.github/workflows/ax7203-led-onehot.yml :: bitstream :: nextpnr place and route
.github/workflows/ax7203-rx-echo-hb.yml :: bitstream :: Yosys synthesis
.github/workflows/ax7203-trinet-baud.yml :: baud :: Yosys
.github/workflows/ax7203-trinet-baud.yml :: baud :: fasm2bit
.github/workflows/ax7203-trinet-dna-probe.yml :: bitstream :: Yosys
.github/workflows/ax7203-trinet-dna-probe.yml :: bitstream :: fasm2bit
.github/workflows/ax7203-trinet-dna-probe.yml :: golden :: DNA read sequence and framing (iverilog)
Expand All @@ -59,10 +57,6 @@
.github/workflows/ax7203-trinet-mac32.yml :: bitstream :: Yosys
.github/workflows/ax7203-trinet-mac32.yml :: bitstream :: fasm2bit
.github/workflows/ax7203-trinet-mac32.yml :: golden :: RTL simulation vs golden vectors (iverilog)
.github/workflows/ax7203-trinet-node-v2.yml :: bitstream :: Yosys
.github/workflows/ax7203-trinet-node-v2.yml :: bitstream :: fasm2bit
.github/workflows/ax7203-trinet-node-v2.yml :: golden :: Node v2 keyed receipts vs the Python golden (iverilog)
.github/workflows/ax7203-trinet-node-v2.yml :: golden :: SipHash core vs the published vectors (iverilog)
.github/workflows/ax7203-uart-loopback.yml :: bitstream :: Yosys synthesis
.github/workflows/ax7203-uart-tx-probe.yml :: bitstream :: Yosys synthesis
.github/workflows/bench007-probe-ax7203.yml :: bitstream :: fasm2frames + xc7frames2bit
Expand Down